This section puts the whole course to work on one small design: a fictional configuration-and-engine peripheral with crossings in both directions, a pulse event, a multi-bit status word, and an asynchronous reset. You get its first version with the defects still in it, a structural report to classify, fixes to verify three ways, one waiver to write properly, and a gate to close. Nothing here teaches a new synchroniser; every technique links back to the section that does.
Lesson | After it you can... |
|---|---|
Read the peripheral specification, draw its crossings, and build the inventory the rest of the section uses. | |
Sort a structural report into defects, waiver candidates, and noise — and defend each verdict. | |
Repair the three defects and prove each fix structurally, with assertions, and in simulation. | |
Write the one legitimate waiver, walk the review checklist, read the dashboard, and state signoff. |
One design runs through all four lessons: the module names peri_top and rst_sync mean the same blocks in every listing, so a finding in the second lesson points at code you can already see in the first. Work the lessons in order; each hands its output to the next, exactly like a real signoff loop.
The loop itself: one design carried from specification through report, fixes, waiver, and gate, with each step's output feeding the next — rather than each technique in isolation.