CDC & RDC

• Design engineers who add crossings to RTL and want structures that pass signoff the first time.

• Verification and signoff engineers who run the methodology: setup, constraints, structural and formal checks, simulation, waivers, and gates.

• Interview candidates who need mechanism-first answers, whiteboard frameworks, and scenario practice.

Each path is an ordered list. Read it top to bottom; every section assumes the vocabulary of the ones above it.

1. Design engineer: foundations, synchronisers, protocols, architecture rules. Clock Domains and Failure Modes, then Metastability and Synchronizers, then CDC Protocols and Handshakes, then Architecture and Design Rules. The decision matrix at the end of the synchroniser section is the payoff: any crossing type to its pattern.

2. Verification and signoff engineer: methodology, constraints, formal and simulation, RDC signoff, debug. CDC Signoff Methodology first, including CDC Constraints and STA and Formal and Simulation CDC Verification, then RDC Signoff, then Debug and Case Studies for report triage practice.

3. Interview: frameworks, scenarios, the bank. Start with the interview overview, then work Interview Prep: the whiteboard framework, the scenario walkthroughs, and the Q&A bank. Attempt every framework drill on a whiteboard before reading its sample answer.

• Classify the crossing type and clock relationship before proposing any fix.

• Draw the two-flop synchroniser, recite its five rules, and spot each broken rule in RTL.

• Map any crossing to its pattern with the decision matrix and name the review hazard.

• Size a FIFO from burst, rate mismatch, and synchroniser latency; state what full and empty guarantee.

• Judge a finding's severity class and choose fix, protocol change, or evidenced waiver.

• Write a waiver with reference, argument, proof, constraint, owner, and expiry.

• Sequence reset release (receivers before senders) and debug ordering failures.

• Explain reconvergence, Gray limits, and MTBF behaviour in interview-proof words.

1. Read each lesson in nav order, starting with How to Use This Course and the Reading Path for your role.

2. Run the examples where the lesson gives runnable code, and answer every check-yourself before revealing the answer.

3. Keep the Glossary and the Cheatsheet open beside every topic.

4. Finish with the Capstone Signoff Lab: classify its report, fix the design, verify, waive what remains, and sign off.

The Capstone Signoff Lab is a small multi-clock peripheral with a fabricated, clearly labelled illustrative report and a runnable design plus testbench. You triage the findings, repair the RTL, waive what is genuinely safe, and assemble the signoff package. Treat it as the exam.

Allow about 25 hours to read through, about 45 hours if you run every example and work the exercises. First read the RTL companions on Metastability and Synchronisation, Asynchronous FIFO, CDC Protocols, Reset Architecture, and Reset Domain Crossing: this course teaches signoff, not those design patterns.

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