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Course contents

  • RTL Foundations36
  • Combinational Design25
  • Sequential Design27
  • FSM & Control27
  • Timing & Clocking39
  • Reset & CDC34
    • Reset Architecture
    • Metastability and Synchronisation
      • What Metastability Means in Practice
      • The Two-Flop Synchroniser
      • When to Use Three Flops
      • CDC Constraints and Implementation Hygiene
      • Do Not Synchronise Buses Bit by Bit
    • Asynchronous FIFO
    • CDC Protocols
    • Reset Domain Crossing
    • CDC Verification
  • Memory & Buses57
  • Advanced RTL28
  • Senior & Interview76
  • Glossary and Notation
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‹Reset & CDC
  1. Topics
  2. RTL Design
  3. Reset & CDC
  4. Metastability and Synchronisation

Part 6 · Reset & CDC · Intermediate

Metastability and Synchronisation

Metastability, two- and three-flop synchronisers, constraints, and multi-bit crossings.

  • 5topics
  • 5lessons

Topics in this section

  1. 1What Metastability Means in Practice1 lesson
  2. 2The Two-Flop Synchroniser1 lesson
  3. 3When to Use Three Flops1 lesson
  4. 4CDC Constraints and Implementation Hygiene1 lesson
  5. 5Do Not Synchronise Buses Bit by Bit1 lesson
On this page

    A signal from another clock domain can change inside the receiving flop's setup-hold window. The flop then becomes metastable and settles late to an unpredictable value, so crossings need synchronisers.

    Source domain signal passing through two flip-flops clocked by the destination clock.
    Two-flop synchroniser: the second flop samples one edge later, giving the first stage additional resolution time and reducing failure probability.

    Lessons in this topic

    5 lessons, about 25 min

    1. 1What Metastability Means in PracticeYou can name the setup-hold window, explain why a longer settling time helps exponentially, and estimate MTBF from the clock rates and the flop's constants.4 min
    2. 2The Two-Flop SynchroniserYou can draw the two-flop synchroniser, state the rules for using it, and explain why a pulse shorter than the destination clock needs a toggle or a handshake.5 min
    3. 3When to Use Three FlopsYou can estimate the MTBF of a synchroniser and decide whether two or three stages meet a system budget.6 min
    4. 4CDC Constraints and Implementation HygieneYou can list the tool risks to a synchroniser, write the constraint a crossing needs, and review a crossing against the hygiene checklist.4 min
    5. 5Do Not Synchronise Buses Bit by BitYou can explain why per-bit synchronisers corrupt a bus, and choose Gray code, a handshake or a FIFO for the data you need to cross.6 min
    Check yourself A 1-bit level signal crosses into a faster clock domain through a plain wire. What might happen?

    The first destination flop can go metastable if the signal changes inside its setup/hold window, and its (random) output can then be seen as different values by different logic, corrupting state. A synchroniser limits that to one controlled flop.

    Interview

    “What is metastability and how do you handle it?” Define the window, say it cannot be eliminated, and describe the two-flop synchroniser with the MTBF argument. Follow with “and for a multi-bit value?” (Gray code, handshake, or FIFO).

    Revision sheet

    The whole topic on one page, taken from each lesson's Remember box. Read it before an interview, or print it.

    What Metastability Means in Practice

    • Only a change inside the setup-hold window can cause it.

    • The output settles to the old or the new value at random, and more settling time makes a long delay exponentially less likely.

    • Simulation can model the random choice, but it cannot measure a real failure rate.

    Rule of thumb: treat the event as certain to happen, and make sure the second flop only ever sees a settled value.

    The Two-Flop Synchroniser

    • Cross one bit, or bits that are independent. Put nothing between the two flops.

    • Use only the second flop's output.

    • The source must hold its value for more than one destination period (in practice 1.5 to 2).

    Rule of thumb: a level that holds still crosses safely; a pulse shorter than the destination period does not.

    When to Use Three Flops

    • MTBF falls quickly as the clock and data rates rise.

    • A third flop adds one cycle of latency and more settling time, and the protocol must tolerate the extra cycle.

    • Choose stages from the implemented settling slack and the system MTBF target, not from frequency alone.

    Rule of thumb: make the stage count a parameter of one wrapper, so a faster clock is a one-line change.

    CDC Constraints and Implementation Hygiene

    • A crossing needs an explicit constraint, not an ordinary setup path.

    • A false path or clock group removes timing checks. It does not make the crossing correct.

    • Wrap the synchroniser once, so its attributes, constraints and checks live in one place.

    Rule of thumb: every constraint that silences a check needs a CDC structural check beside it.

    Do Not Synchronise Buses Bit by Bit

    • Independent bits may each use a synchroniser. Related bits may not.

    • A sample taken mid-change can be neither the old word nor the new one: the bus 0111 to 1000 was read as 4 between 7 and 8.

    • Gray code works for counters because only one bit changes per step. For general data, use a handshake or a FIFO.

    Rule of thumb: cross one bit with a synchroniser; cross a word with a protocol.

    Practise it

    • Mini project: a two-clock block with a handshake, an async FIFO and a hostile test

    • Practice question: Metastability in a CDC control path, analysed from a waveform

    • Practice question: A 3-flop synchroniser that still causes glitches

    • Practice question: Design a CDC synchroniser for a memory-peripheral transfer

    • Code lab: Build the 2-flop synchroniser

    • Interview: run a mock interview on this topic

    PreviousNext: What Metastability Means in Practice

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    See also

    • Reset Architecture
    • Asynchronous FIFO
    • CDC Protocols