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Course contents

  • How to Use This Course
  • Reading Path
  • CDC/RDC Glossary
  • CDC/RDC Metrics Reference
  • CDC/RDC Interview Prep
  • CDC/RDC Signoff Cheatsheet
  • Clock Domains and Failure Modes8
  • Metastability and Synchronizers16
  • CDC Protocols and Handshakes16
  • Reconvergence and Gray Coding16
  • Reset Domain Crossing16
  • Architecture and Design Rules16
  • CDC Signoff Methodology24
  • RDC Signoff16
  • Debug and Case Studies11
  • CDC and RDC Interview Prep30
    • CDC/RDC Whiteboard Framework
    • CDC/RDC Framework Drills
    • Scenario: Metastability Bug
    • Scenario: Metastability Escape in Silicon Bring-up
    • Scenario: Async FIFO Pointer Mismatch
      • The Scenario
      • Diagnosis
      • Fix and Guard
    • Scenario: Waiver Debate
    • Scenario: RDC Waiver Under Tapeout Pressure
    • CDC/RDC Interview Q&A Bank
    • CDC/RDC Interview Q&A Bank (Expanded)
  • Capstone: Sign Off a Multi-clock Peripheral4
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‹Scenario: Async FIFO Pointer Mismatch
  1. Topics
  2. CDC & RDC
  3. CDC and RDC Interview Prep
  4. Scenario: Async FIFO Pointer Mismatch
  5. Fix and Guard

Part 10 · Interview Prep · All levels

Fix and Guard

The pointer-crossing fix with its trade-offs and the regression guards that keep it fixed.

The fix matches the check that failed, and each fix below carries its price. Say the price out loud: interviewers promote candidates who cost their fixes.

Failed check

Fix

Trade-off

Non-Gray transitions

True Gray write pointer across the full range, proven one-bit per step.

Encoder logic and range discipline; no throughput cost.

Illegal synchroniser

Dedicated two-flop chain per pointer bit in the read clock.

Two read cycles of empty-flag latency: the flag is conservative by construction.

Misplaced comparison

Empty computed in the read domain from local read pointer plus synchronised write pointer.

Duplicated comparison logic per domain; full is mirrored in the write domain.

Reset misalignment

Both pointers released to empty-state values in a defined order, re-verified after the change.

Reset sequencing constraints the system must honour.

Regression guards

Three guards keep the fix fixed. First, an assertion that the crossed pointer changes at most one bit per write step, so any future counter edit that breaks Gray fails immediately. Second, a structural check on the pointer crossing in every regression, so no optimisation pass can merge or bypass a synchroniser stage unnoticed. Third, a directed reset test covering every supported reset sequence, asserting the FIFO starts empty and the first burst reads back exactly what was written. The assertion strategy follows Assertions for Protocols.

design.sv
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// bad-example
// Comparing two freshly crossed pointers in one domain: empty_wrong
// mixes a write crossing with a read crossing (two skews, one gate).
// The structural reconvergence check flags exactly this shape.
assign empty_wrong = (wr_ptr_sync == rd_ptr_sync);

The snippet above is the shape the comparison-placement check hunts: two synchronised copies meeting in one gate. Legal code compares a local pointer against one synchronised copy, in the comparison's own domain.

Interview

Close the scenario by naming the evidence package: transition assertion, structural report, reset-sequence test. Three checks, one sentence each: that is what a 4 sounds like on a debug question.

Check yourself Why is "empty is conservative by construction" a feature rather than a bug?

Synchroniser latency delays the write pointer's arrival, so empty can assert when data has just arrived but can never deassert while data is missing: the error direction is always safe, stalling rather than corrupting.

Related topics

  • Next: Scenario: Waiver Debate

  • Metastability-aware simulation

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See also

  • The Scenario