Scenario: Metastability Escape in Silicon Bring-up

Scenario

A control pulse crosses into a slower clock domain. Simulation was clean, but silicon logs show intermittent bring-up hangs under voltage droop and high temperature.

OBSERVED METRIC
rare boot hang in one SKU at hot corner

45-MINUTE INTERVIEW FLOW
0-5: classify crossing/reset scope
5-15: explain mechanism and assumptions
15-25: request and interpret evidence
25-35: propose fix/waiver/escalation
35-45: define regression + signoff

Common pitfalls

• Assume random noise without crossing audit

• Rely on two-flop sync for one-cycle pulse without width analysis

• Skip formal/liveness checks after RTL patch

Scenario debrief

Score each response on mechanism clarity, evidence quality, and signoff decision discipline.

INTERVIEW FLOW

classify -> explain mechanism -> propose fix -> state regression

PRACTICE SCORE

session1 62%
session2 78%
session3 89%

Debrief prompts

1. Which crossing class or reset dependency failed first?

2. What evidence changed your decision?

3. Fix, waive, or escalate and why?

Key takeaways

• State crossing class, assumptions, and owner with every issue.

• Run structural and dynamic regressions after each fix.

Common pitfalls

• Treating all warnings as equivalent risk.

• Waiving issues without containment evidence.

• Skipping reset and reconvergence stress after CDC fixes.