Synthesis & Logic Optimization · All levels

Leakage Recovery: Interview Drills

Interview Drills for Leakage Recovery.

Interview drills

Interview Drills for Leakage Recovery focuses on leakage delta, WNS guardband consumed, swapped-cell count. The goal is to connect observed QoR movement to mechanism, ownership, and regression risk.

diagram
PROMPT
You observe leakage delta, WNS guardband consumed, swapped-cell count in Leakage Recovery. Walk through root cause and closure plan.

STRONG ANSWER
1. Names run context and affected QoR lane.
2. Explains Leakage recovery replaces fast cells with higher-VT alternatives while preserving margin on critical paths and corners.
3. Requests leakage recovery report, swap list, hold/setup regression report.
4. Proposes one reversible fix and full regression scope.

WEAK ANSWER
Jumps to random tool switches without mechanism evidence.

Whiteboard diagram

Leakage recovery pass

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timing-safe cells
  -> swap to higher VT
  -> re-check setup/hold
  -> keep only safe swaps

Root-cause narration

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ROOT-CAUSE TREE — Leakage Recovery

leakage delta, WNS guardband consumed, swapped-cell count regressed
        |
   same RTL/constraints tag?
     /              \
   no                yes
   |                  |
input drift      transform side-effect
 /    \             /         \
SDC    libs      mapping      physical estimate
diff   diff      choice       mismatch

Synthesis deep dive

PPA closure is a constrained tradeoff problem, not a timing-only exercise.

Concept diagram

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PPA TRIAD

timing target <-> power budget <-> area cap

Metric graph

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PARETO PROGRESSION

early runs      o o
balanced point    o
over-tuned          o (risk)

Reports and artifacts

  • VT mix

  • leakage trend

  • dynamic power trend

  • PPA Pareto table

Mini case study

LVT-heavy fix recovered setup but violated leakage target; balanced VT strategy closed both.

Debug branches

  • Timing-only claims need power check

  • Validate hold on VT swaps

  • Use Pareto memo

Senior review question

Ask: what evidence proves this QoR move is real and stable?

Key takeaways

  • State exact run context (RTL, SDC, libs, switches) with every QoR claim.

  • Re-run timing, area, and power regressions after each synthesis ECO.

Common pitfalls

  • Comparing runs with mismatched constraints or library views.

  • Timing-only fixes that violate power or area budgets.

  • Skipping equivalence checks after structural changes.

Principal synthesis review addendum

Leakage recovery replaces fast cells with higher-VT alternatives while preserving margin on critical paths and corners.

Metric: leakage delta, WNS guardband consumed, swapped-cell count