Leakage Recovery: Mechanism

Mechanism to understand

Mechanism for Leakage Recovery focuses on leakage delta, WNS guardband consumed, swapped-cell count. The goal is to connect observed QoR movement to mechanism, ownership, and regression risk.

Leakage recovery replaces fast cells with higher-VT alternatives while preserving margin on critical paths and corners. Treat synthesis as a contract: constraints + transforms + reports must agree.

• Identify which lane moved first: timing, area, power, or runtime.

• Identify whether drift is input, transform, or correlation related.

• Identify owner before applying any ECO.

Flow model

SYNTHESIS FLOW — Leakage Recovery

RTL + constraints
      |
      v
elaboration + checks
      |
      v
mapping + optimization
      |
      v
QoR reports (timing/area/power)
      |
      v
incremental ECO + regression

Primary metric: leakage delta, WNS guardband consumed, swapped-cell count

Leakage recovery pass

timing-safe cells
  -> swap to higher VT
  -> re-check setup/hold
  -> keep only safe swaps

Layer responsibilities

SYNTHESIS OWNERSHIP LAYERS — Leakage Recovery

layer               owns                          failure mode
----------------    ---------------------------   -------------------------
constraints         clocks/exceptions/policy      fake QoR optimism
mapping             cell choices/structure        depth/fanout regressions
optimization        timing/power tradeoffs        one-metric overfitting
physical-aware      topo/congestion estimates     handoff delta surprises
closure             ECO order/regression          fixes break other corners

Synthesis deep dive

PPA closure is a constrained tradeoff problem, not a timing-only exercise.

Concept diagram

PPA TRIAD

timing target <-> power budget <-> area cap

Metric graph

PARETO PROGRESSION

early runs      o o
balanced point    o
over-tuned          o (risk)

Reports and artifacts

• VT mix

• leakage trend

• dynamic power trend

• PPA Pareto table

Mini case study

LVT-heavy fix recovered setup but violated leakage target; balanced VT strategy closed both.

Debug branches

• Timing-only claims need power check

• Validate hold on VT swaps

• Use Pareto memo

Senior review question

Ask: what evidence proves this QoR move is real and stable?

Key takeaways

• State exact run context (RTL, SDC, libs, switches) with every QoR claim.

• Re-run timing, area, and power regressions after each synthesis ECO.

Common pitfalls

• Comparing runs with mismatched constraints or library views.

• Timing-only fixes that violate power or area budgets.

• Skipping equivalence checks after structural changes.

Mechanism deep dive

Leakage recovery replaces fast cells with higher-VT alternatives while preserving margin on critical paths and corners.