VT Mix Strategy: Step-by-Step Walkthrough

Step-by-step analysis walkthrough

Use when you own VT Mix Strategy in a synthesis closure review.

1. Confirm exact run context (RTL/SDC/lib/switch set).

2. Open section QoR dashboard and identify first drift.

3. Inspect topic-level report for mechanism evidence.

4. Determine owner and candidate reversible action.

5. Apply one change only; avoid bundled fixes.

6. Run full timing/area/power checks.

7. Validate side effects on neighboring path groups.

8. Publish memo with outcome and residual risk.

Artifacts to collect

• VT distribution report, leakage breakdown, timing split report

• QoR dashboard

• run manifest

• constraint diff

• regression matrix

Decision memo template

SYNTHESIS DECISION MEMO — VT Mix Strategy
run context:
observed metric:
hypothesis:
fix:
regression:
owners: synthesis owner, power owner, STA owner

Reference visuals

VT mix triangle

LVT: speed ++ leakage --
SVT: balance
HVT: speed -- leakage ++

mix per criticality bucket

Synthesis deep dive

PPA closure is a constrained tradeoff problem, not a timing-only exercise.

Concept diagram

PPA TRIAD

timing target <-> power budget <-> area cap

Metric graph

PARETO PROGRESSION

early runs      o o
balanced point    o
over-tuned          o (risk)

Reports and artifacts

• VT mix

• leakage trend

• dynamic power trend

• PPA Pareto table

Mini case study

LVT-heavy fix recovered setup but violated leakage target; balanced VT strategy closed both.

Debug branches

• Timing-only claims need power check

• Validate hold on VT swaps

• Use Pareto memo

Senior review question

Ask: what evidence proves this QoR move is real and stable?

Key takeaways

• State exact run context (RTL, SDC, libs, switches) with every QoR claim.

• Re-run timing, area, and power regressions after each synthesis ECO.

Common pitfalls

• Comparing runs with mismatched constraints or library views.

• Timing-only fixes that violate power or area budgets.

• Skipping equivalence checks after structural changes.

Principal synthesis review addendum

VT assignment trades delay against leakage; poor mix causes either timing misses or unnecessary static power burn.

Metric: HVT/SVT/LVT cell mix, setup/hold slack distribution, leakage budget