Synthesis & Logic Optimization · All levels

Synthesis SDC Contracts

Constraints & QoR: Synthesis SDC defines clocks, IO assumptions, and optimization boundaries; weak constraints produce fake QoR wins and expensive downstream churn.

What this topic teaches

Synthesis SDC Contracts teaches how to turn synthesis intent into stable QoR outcomes. Synthesis SDC defines clocks, IO assumptions, and optimization boundaries; weak constraints produce fake QoR wins and expensive downstream churn. Senior practice is proving whether metric movement is real, reproducible, and owned.

The senior-engineer question

When compile WNS/TNS, unconstrained endpoint count, SDC lint error rate moves, can you name the run context, mechanism, owner, and minimal fix that holds under regression?

diagram

SYNTHESIS FLOW — Synthesis SDC Contracts

RTL + constraints
      |
      v
elaboration + checks
      |
      v
mapping + optimization
      |
      v
QoR reports (timing/area/power)
      |
      v
incremental ECO + regression

Primary metric: compile WNS/TNS, unconstrained endpoint count, SDC lint error rate

Picture the synthesis flow

Draw the behavior before diving into tool commands. These diagrams are the whiteboard models to memorize for reviews and interviews.

Synthesis constraint contract

diagram

SDC CONTRACT

create_clock / generated_clock
set_input_delay / set_output_delay
exceptions (false/multicycle, audited)
compile QoR + unconstrained path report

Bad contract => misleading QoR.

QoR trend shape

diagram

QOR TREND — Synthesis SDC Contracts

metric quality
  ^
  |                      target band
  |                o  o  o
  |            o
  |      o  regression
  +----------------------------------> synthesis iteration
   baseline    tuning     signoff-ready

Track: compile WNS/TNS, unconstrained endpoint count, SDC lint error rate

Who owns which layer

diagram

SYNTHESIS OWNERSHIP LAYERS — Synthesis SDC Contracts

layer               owns                          failure mode
----------------    ---------------------------   -------------------------
constraints         clocks/exceptions/policy      fake QoR optimism
mapping             cell choices/structure        depth/fanout regressions
optimization        timing/power tradeoffs        one-metric overfitting
physical-aware      topo/congestion estimates     handoff delta surprises
closure             ECO order/regression          fixes break other corners

Evidence to collect

Primary metric: compile WNS/TNS, unconstrained endpoint count, SDC lint error rate.
Primary artifact: compile report, SDC lint log, unconstrained path report.
Owners to involve: synthesis owner, STA owner, RTL owner.
One baseline run and one regressed run with matching manifests.
A rollback-safe change proposal with full regression scope.

Ownership map

diagram

OWNERSHIP MAP — Synthesis SDC Contracts

artifact              owner
----------------      -----------------
compile owner       synthesis owner
timing/power owner  STA owner
cross-team review   RTL owner

Every QoR movement needs a named owner before ECO.

Subpages in this topic

Each topic is taught through mechanism, interfaces, reports, debug, worked example, pitfalls, interview, checklist, theory, design space, expanded case study, walkthrough, comparison matrix, software view, and silicon PPA impact.

Key takeaways

Always present QoR with run context and artifact.
Prefer reversible fixes with explicit rollback criteria.
Re-run timing, area, and power checks before closing.

Common pitfalls

Comparing unlike compile contexts.
Timing-only wins that worsen power or area.
Skipping equivalence checks after structural changes.

Synthesis deep dive

Constraint hygiene determines whether synthesis QoR is trustworthy.

Concept diagram

diagram

CONSTRAINT FLOW

RTL intent -> synthesis SDC -> compile checks -> QoR dashboard -> review gate

Metric graph

diagram

QOR HEALTH

constraint lint pass   ███████████████
unconstrained count    ███
policy violations      ██

Reports and artifacts

compile QoR
unconstrained endpoints
constraint lint
policy audit log

Mini case study

Nightly WNS improved but unconstrained paths jumped; strict SDC lint restored true QoR picture.

Debug branches

Diff SDC first
Audit dont_touch scope
Track unconstrained trend weekly

Senior review question

Ask: what evidence proves this QoR move is real and stable?

Key takeaways

State exact run context (RTL, SDC, libs, switches) with every QoR claim.
Re-run timing, area, and power regressions after each synthesis ECO.

Common pitfalls

Comparing runs with mismatched constraints or library views.
Timing-only fixes that violate power or area budgets.
Skipping equivalence checks after structural changes.

Practice this lesson