Synthesis & Logic Optimization · All levels

Synthesis SDC Contracts: Debug Playbook

Debug Playbook for Synthesis SDC Contracts.

Debug playbook

Debug Playbook for Synthesis SDC Contracts focuses on compile WNS/TNS, unconstrained endpoint count, SDC lint error rate. The goal is to connect observed QoR movement to mechanism, ownership, and regression risk.

Synthesis debug finds the first causal drift, not the loudest downstream symptom.

Root-cause tree

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ROOT-CAUSE TREE — Synthesis SDC Contracts

compile WNS/TNS, unconstrained endpoint count, SDC lint error rate regressed
        |
   same RTL/constraints tag?
     /              \
   no                yes
   |                  |
input drift      transform side-effect
 /    \             /         \
SDC    libs      mapping      physical estimate
diff   diff      choice       mismatch
  1. Freeze baseline and regressed run manifests.

  2. Verify RTL/SDC/library deltas before transform tuning.

  3. Classify issue: constraints, mapping choice, physical estimate, or ECO side effect.

  4. Pick one minimal reversible change.

  5. Re-run full timing/area/power checks with ownership signoff.

Review memo template

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STAFF SYNTHESIS REVIEW MEMO — Constraints & QoR / Synthesis SDC Contracts

1. Symptom
   - Watched metric: compile WNS/TNS, unconstrained endpoint count, SDC lint error rate
   - Affected compile run: <tag/build ID>
   - Impacted path/class: <critical group / power lane / area lane>
   - Database tags: <RTL, SDC, libs, switches>

2. Mechanism hypothesis
   - Primary mechanism: Synthesis SDC defines clocks, IO assumptions, and optimization boundaries; weak constraints produce fake QoR wins and expensive downstream churn.
   - Competing hypothesis: <constraint drift, mapping choice, physical estimate mismatch>
   - Missing evidence: <report diff, dashboard trend, ownership board>

3. Proposed action
   - Minimal reversible change: <constraint patch, compile knob, ECO cell move>
   - Expected movement: <timing / area / power delta>
   - Regression risk: hold, power spike, leakage drift, formal mismatch

4. Signoff
   - Re-run artifact: compile report, SDC lint log, unconstrained path report
   - Required owners: synthesis owner, STA owner, RTL owner
   - Final decision: merge, rollback, or escalate

Synthesis deep dive

Constraint hygiene determines whether synthesis QoR is trustworthy.

Concept diagram

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CONSTRAINT FLOW

RTL intent -> synthesis SDC -> compile checks -> QoR dashboard -> review gate

Metric graph

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QOR HEALTH

constraint lint pass   ███████████████
unconstrained count    ███
policy violations      ██

Reports and artifacts

  • compile QoR

  • unconstrained endpoints

  • constraint lint

  • policy audit log

Mini case study

Nightly WNS improved but unconstrained paths jumped; strict SDC lint restored true QoR picture.

Debug branches

  • Diff SDC first

  • Audit dont_touch scope

  • Track unconstrained trend weekly

Senior review question

Ask: what evidence proves this QoR move is real and stable?

Key takeaways

  • State exact run context (RTL, SDC, libs, switches) with every QoR claim.

  • Re-run timing, area, and power regressions after each synthesis ECO.

Common pitfalls

  • Comparing runs with mismatched constraints or library views.

  • Timing-only fixes that violate power or area budgets.

  • Skipping equivalence checks after structural changes.

Principal synthesis review addendum

Synthesis SDC defines clocks, IO assumptions, and optimization boundaries; weak constraints produce fake QoR wins and expensive downstream churn.

Metric: compile WNS/TNS, unconstrained endpoint count, SDC lint error rate