Synthesis & Logic Optimization · All levels

Synthesis SDC Contracts: Worked Example

Worked Example for Synthesis SDC Contracts.

Worked example

Worked Example for Synthesis SDC Contracts focuses on compile WNS/TNS, unconstrained endpoint count, SDC lint error rate. The goal is to connect observed QoR movement to mechanism, ownership, and regression risk.

A weekly compile reports compile WNS/TNS, unconstrained endpoint count, SDC lint error rate regression. Instead of random knob tuning, start by proving whether input context changed and which mechanism dominates.

Sequence under inspection

diagram
SYNTHESIS FLOW — Synthesis SDC Contracts

RTL + constraints
      |
      v
elaboration + checks
      |
      v
mapping + optimization
      |
      v
QoR reports (timing/area/power)
      |
      v
incremental ECO + regression

Primary metric: compile WNS/TNS, unconstrained endpoint count, SDC lint error rate

Synthesis constraint contract

diagram
SDC CONTRACT

create_clock / generated_clock
set_input_delay / set_output_delay
exceptions (false/multicycle, audited)
compile QoR + unconstrained path report

Bad contract => misleading QoR.
  1. Capture baseline and regressed artifact pair.

  2. Confirm manifest parity (RTL, SDC, libs, switches).

  3. Pin first metric drift and mechanism hypothesis.

  4. Reproduce with compile report, SDC lint log, unconstrained path report.

  5. Apply one reversible fix and run matrix regression.

Did the fix hold?

diagram
BEFORE / AFTER QOR — Synthesis SDC Contracts

QoR score
  0 |                     --- target zone
 -1 |        ● regression
 -2 |             ● baseline
 -0.5|                  ● after fix
    +----------------------------------> iteration

Validate timing + area + power, not one number.

Synthesis deep dive

Constraint hygiene determines whether synthesis QoR is trustworthy.

Concept diagram

diagram
CONSTRAINT FLOW

RTL intent -> synthesis SDC -> compile checks -> QoR dashboard -> review gate

Metric graph

diagram
QOR HEALTH

constraint lint pass   ███████████████
unconstrained count    ███
policy violations      ██

Reports and artifacts

  • compile QoR

  • unconstrained endpoints

  • constraint lint

  • policy audit log

Mini case study

Nightly WNS improved but unconstrained paths jumped; strict SDC lint restored true QoR picture.

Debug branches

  • Diff SDC first

  • Audit dont_touch scope

  • Track unconstrained trend weekly

Senior review question

Ask: what evidence proves this QoR move is real and stable?

Key takeaways

  • State exact run context (RTL, SDC, libs, switches) with every QoR claim.

  • Re-run timing, area, and power regressions after each synthesis ECO.

Common pitfalls

  • Comparing runs with mismatched constraints or library views.

  • Timing-only fixes that violate power or area budgets.

  • Skipping equivalence checks after structural changes.

Principal synthesis review addendum

Synthesis SDC defines clocks, IO assumptions, and optimization boundaries; weak constraints produce fake QoR wins and expensive downstream churn.

Metric: compile WNS/TNS, unconstrained endpoint count, SDC lint error rate