Pipeline Tradeoffs: Step-by-Step Walkthrough

Step-by-step analysis walkthrough

Use when you own Pipeline Tradeoffs in a synthesis closure review.

1. Confirm exact run context (RTL/SDC/lib/switch set).

2. Open section QoR dashboard and identify first drift.

3. Inspect topic-level report for mechanism evidence.

4. Determine owner and candidate reversible action.

5. Apply one change only; avoid bundled fixes.

6. Run full timing/area/power checks.

7. Validate side effects on neighboring path groups.

8. Publish memo with outcome and residual risk.

Artifacts to collect

• pipeline option matrix, latency budget, closure comparison

• QoR dashboard

• run manifest

• constraint diff

• regression matrix

Decision memo template

SYNTHESIS DECISION MEMO — Pipeline Tradeoffs
run context:
observed metric:
hypothesis:
fix:
regression:
owners: microarchitecture owner, RTL owner, synthesis lead

Reference visuals

Pipeline decision plane

more stages -> better Fmax
more stages -> higher latency + verification cost
pick based on product constraints

Synthesis deep dive

Datapath and retiming gains are only real if formal and timing remain clean.

Concept diagram

DATAPATH + RETIME

operator inference -> stage balancing -> formal proof -> QoR validation

Metric graph

FREQUENCY VS LATENCY

Fmax gain   ████████
latency cost ████

Reports and artifacts

• retiming report

• datapath inference log

• equivalence status

• latency impact sheet

Mini case study

Retiming met frequency target, but missing formal hooks delayed closure by two days.

Debug branches

• Check retime blockers

• Formal first for aggressive moves

• Compare with pipeline option

Senior review question

Ask: what evidence proves this QoR move is real and stable?

Key takeaways

• State exact run context (RTL, SDC, libs, switches) with every QoR claim.

• Re-run timing, area, and power regressions after each synthesis ECO.

Common pitfalls

• Comparing runs with mismatched constraints or library views.

• Timing-only fixes that violate power or area budgets.

• Skipping equivalence checks after structural changes.

Principal synthesis review addendum

Pipeline changes trade latency for frequency and area; strong teams quantify benefit versus verification and microarchitecture cost.

Metric: latency cycles, throughput target hit rate, WNS improvement per stage