ECO Netlist Patches: Interview Drills

Interview drills

Interview Drills for ECO Netlist Patches focuses on patch count, setup/hold recovery, patch-induced side effects. The goal is to connect observed QoR movement to mechanism, ownership, and regression risk.

PROMPT
You observe patch count, setup/hold recovery, patch-induced side effects in ECO Netlist Patches. Walk through root cause and closure plan.

STRONG ANSWER
1. Names run context and affected QoR lane.
2. Explains ECO patching edits gate-level logic for urgent fixes; patch quality depends on locality, observability, and verification closure.
3. Requests netlist diff, ECO patch log, post-patch timing report.
4. Proposes one reversible fix and full regression scope.

WEAK ANSWER
Jumps to random tool switches without mechanism evidence.

Whiteboard diagram

Netlist patch loop

failing path -> patch cell/net
          -> re-run timing
          -> run equivalence
          -> merge or rollback

Root-cause narration

ROOT-CAUSE TREE — ECO Netlist Patches

patch count, setup/hold recovery, patch-induced side effects regressed
        |
   same RTL/constraints tag?
     /              \
   no                yes
   |                  |
input drift      transform side-effect
 /    \             /         \
SDC    libs      mapping      physical estimate
diff   diff      choice       mismatch

Synthesis deep dive

Incremental and ECO synthesis protect schedule only with strict regression discipline.

Concept diagram

INCREMENTAL ECO LOOP

identify delta -> localized compile -> patch -> regression -> release

Metric graph

ECO CYCLE TIME

full compile      ███████████
incremental       █████

Reports and artifacts

• incremental reuse

• ECO patch list

• LEC status

• regression matrix

Mini case study

Localized compile cut turnaround 40%, but skipped LEC caused rollback.

Debug branches

• Reuse ratio is not enough

• Patch locality check

• Always include equivalence hooks

Senior review question

Ask: what evidence proves this QoR move is real and stable?

Key takeaways

• State exact run context (RTL, SDC, libs, switches) with every QoR claim.

• Re-run timing, area, and power regressions after each synthesis ECO.

Common pitfalls

• Comparing runs with mismatched constraints or library views.

• Timing-only fixes that violate power or area budgets.

• Skipping equivalence checks after structural changes.

Principal synthesis review addendum

ECO patching edits gate-level logic for urgent fixes; patch quality depends on locality, observability, and verification closure.

Metric: patch count, setup/hold recovery, patch-induced side effects