Synthesis & Logic Optimization · All levels

Scenario: QoR Storm: Inputs & Outputs

Inputs & Outputs for Scenario: QoR Storm.

Inputs and outputs contract

Inputs & Outputs for Scenario: QoR Storm focuses on overnight WNS/TNS regression with no RTL intent change. The goal is to connect observed QoR movement to mechanism, ownership, and regression risk.

Synthesis closure fails when teams optimize against different assumptions. Treat these artifacts as a signed handoff contract.

diagram
INPUTS
  - RTL tag and compile switches
  - SDC / policy constraints
  - Library and operating views
  - Optional physical estimates (topo/congestion)

OUTPUTS
  - QoR timing/area/power reports
  - transform/mapping summaries
  - owner-tagged closure memo
  - regression matrix verdict

Flow sequence

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SYNTHESIS FLOW — Scenario: QoR Storm

RTL + constraints
      |
      v
elaboration + checks
      |
      v
mapping + optimization
      |
      v
QoR reports (timing/area/power)
      |
      v
incremental ECO + regression

Primary metric: overnight WNS/TNS regression with no RTL intent change

Ownership map

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OWNERSHIP MAP — Scenario: QoR Storm

artifact              owner
----------------      -----------------
compile owner       synthesis lead
timing/power owner  STA owner
cross-team review   CAD owner

Every QoR movement needs a named owner before ECO.

Synthesis deep dive

Interview readiness comes from repeatable QoR reasoning under pressure.

Concept diagram

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INTERVIEW ANSWER SHAPE

context -> metric -> mechanism -> fix -> regression -> ownership

Metric graph

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PANEL SCORING

clarity      ███████
mechanism    ██████
regression   █████

Reports and artifacts

  • mock scorecard

  • scenario debrief

  • Q&A coverage

  • framework adherence

Mini case study

Candidate improved by replacing tool-command answers with evidence-driven closure narratives.

Debug branches

  • State assumptions first

  • Defend option tradeoffs

  • Close with rollback/regression

Senior review question

Ask: what evidence proves this QoR move is real and stable?

Key takeaways

  • State exact run context (RTL, SDC, libs, switches) with every QoR claim.

  • Re-run timing, area, and power regressions after each synthesis ECO.

Common pitfalls

  • Comparing runs with mismatched constraints or library views.

  • Timing-only fixes that violate power or area budgets.

  • Skipping equivalence checks after structural changes.

Principal synthesis review addendum

QoR storms test run-hygiene fundamentals: constraint diffs, library updates, and compile switches before speculative ECO.

Metric: overnight WNS/TNS regression with no RTL intent change