Synthesis Whiteboard Framework

What this topic teaches

Synthesis Whiteboard Framework teaches how to turn synthesis intent into stable QoR outcomes. Strong synthesis answers narrate constraint intent, mapping path, QoR evidence, and regression risk in a fixed reusable structure. Senior practice is proving whether metric movement is real, reproducible, and owned.

The senior-engineer question

When answer completeness score, mechanism-first explanation quality moves, can you name the run context, mechanism, owner, and minimal fix that holds under regression?

SYNTHESIS FLOW — Synthesis Whiteboard Framework

RTL + constraints
      |
      v
elaboration + checks
      |
      v
mapping + optimization
      |
      v
QoR reports (timing/area/power)
      |
      v
incremental ECO + regression

Primary metric: answer completeness score, mechanism-first explanation quality

Picture the synthesis flow

Draw the behavior before diving into tool commands. These diagrams are the whiteboard models to memorize for reviews and interviews.

Interview answer skeleton

context -> metric -> mechanism
-> fix option -> regression -> ownership

QoR trend shape

QOR TREND — Synthesis Whiteboard Framework

metric quality
  ^
  |                      target band
  |                o  o  o
  |            o
  |      o  regression
  +----------------------------------> synthesis iteration
   baseline    tuning     signoff-ready

Track: answer completeness score, mechanism-first explanation quality

Who owns which layer

SYNTHESIS OWNERSHIP LAYERS — Synthesis Whiteboard Framework

layer               owns                          failure mode
----------------    ---------------------------   -------------------------
constraints         clocks/exceptions/policy      fake QoR optimism
mapping             cell choices/structure        depth/fanout regressions
optimization        timing/power tradeoffs        one-metric overfitting
physical-aware      topo/congestion estimates     handoff delta surprises
closure             ECO order/regression          fixes break other corners

Evidence to collect

• Primary metric: answer completeness score, mechanism-first explanation quality.

• Primary artifact: whiteboard template, answer rubric, mock interview log.

• Owners to involve: candidate, interviewer, panel lead.

• One baseline run and one regressed run with matching manifests.

• A rollback-safe change proposal with full regression scope.

Ownership map

OWNERSHIP MAP — Synthesis Whiteboard Framework

artifact              owner
----------------      -----------------
compile owner       candidate
timing/power owner  interviewer
cross-team review   panel lead

Every QoR movement needs a named owner before ECO.

Subpages in this topic

Each topic is taught through mechanism, interfaces, reports, debug, worked example, pitfalls, interview, checklist, theory, design space, expanded case study, walkthrough, comparison matrix, software view, and silicon PPA impact.

Key takeaways

• Always present QoR with run context and artifact.

• Prefer reversible fixes with explicit rollback criteria.

• Re-run timing, area, and power checks before closing.

Common pitfalls

• Comparing unlike compile contexts.

• Timing-only wins that worsen power or area.

• Skipping equivalence checks after structural changes.

Synthesis deep dive

Interview readiness comes from repeatable QoR reasoning under pressure.

Concept diagram

INTERVIEW ANSWER SHAPE

context -> metric -> mechanism -> fix -> regression -> ownership

Metric graph

PANEL SCORING

clarity      ███████
mechanism    ██████
regression   █████

Reports and artifacts

• mock scorecard

• scenario debrief

• Q&A coverage

• framework adherence

Mini case study

Candidate improved by replacing tool-command answers with evidence-driven closure narratives.

Debug branches

• State assumptions first

• Defend option tradeoffs

• Close with rollback/regression

Senior review question

Ask: what evidence proves this QoR move is real and stable?

Key takeaways

• State exact run context (RTL, SDC, libs, switches) with every QoR claim.

• Re-run timing, area, and power regressions after each synthesis ECO.

Common pitfalls

• Comparing runs with mismatched constraints or library views.

• Timing-only fixes that violate power or area budgets.

• Skipping equivalence checks after structural changes.