Synthesis & Logic Optimization · All levels
Timing-Driven Synthesis: Interview Drills
Interview Drills for Timing-Driven Synthesis.
Interview drills
Interview Drills for Timing-Driven Synthesis focuses on critical path WNS, violating endpoint count, compile effort distribution. The goal is to connect observed QoR movement to mechanism, ownership, and regression risk.
PROMPT
You observe critical path WNS, violating endpoint count, compile effort distribution in Timing-Driven Synthesis. Walk through root cause and closure plan.
STRONG ANSWER
1. Names run context and affected QoR lane.
2. Explains Timing-driven compile focuses optimization where slack is most constrained, balancing global QoR instead of over-optimizing non-critical logic.
3. Requests critical range report, path-group WNS report, effort histogram.
4. Proposes one reversible fix and full regression scope.
WEAK ANSWER
Jumps to random tool switches without mechanism evidence.Whiteboard diagram
Timing-driven effort allocation
path groups ranked by slack
|
v
high effort on critical groups
medium effort on near-critical
low effort elsewhereRoot-cause narration
ROOT-CAUSE TREE — Timing-Driven Synthesis
critical path WNS, violating endpoint count, compile effort distribution regressed
|
same RTL/constraints tag?
/ \
no yes
| |
input drift transform side-effect
/ \ / \
SDC libs mapping physical estimate
diff diff choice mismatchSynthesis deep dive
Mapping converts logic intent into real PPA outcomes.
Concept diagram
MAPPING LOOP
boolean net -> library mapping -> optimization -> report and iterateMetric graph
MAPPING IMPACT
depth reduction ███████
fanout cleanup █████
runtime overhead ███Reports and artifacts
mapping summary
critical path cell list
fanout/slew report
library coverage
Mini case study
Cell-heavy critical path improved after restructuring, while blanket buffering had worsened power.
Debug branches
Depth issue -> structure
Fanout issue -> buffers
Library mismatch -> view audit
Senior review question
Ask: what evidence proves this QoR move is real and stable?
Key takeaways
State exact run context (RTL, SDC, libs, switches) with every QoR claim.
Re-run timing, area, and power regressions after each synthesis ECO.
Common pitfalls
Comparing runs with mismatched constraints or library views.
Timing-only fixes that violate power or area budgets.
Skipping equivalence checks after structural changes.
Principal synthesis review addendum
Timing-driven compile focuses optimization where slack is most constrained, balancing global QoR instead of over-optimizing non-critical logic.
Metric: critical path WNS, violating endpoint count, compile effort distribution