Timing-Driven Synthesis: Mechanism

Mechanism to understand

Mechanism for Timing-Driven Synthesis focuses on critical path WNS, violating endpoint count, compile effort distribution. The goal is to connect observed QoR movement to mechanism, ownership, and regression risk.

Timing-driven compile focuses optimization where slack is most constrained, balancing global QoR instead of over-optimizing non-critical logic. Treat synthesis as a contract: constraints + transforms + reports must agree.

• Identify which lane moved first: timing, area, power, or runtime.

• Identify whether drift is input, transform, or correlation related.

• Identify owner before applying any ECO.

Flow model

SYNTHESIS FLOW — Timing-Driven Synthesis

RTL + constraints
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      v
elaboration + checks
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      v
mapping + optimization
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      v
QoR reports (timing/area/power)
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      v
incremental ECO + regression

Primary metric: critical path WNS, violating endpoint count, compile effort distribution

Timing-driven effort allocation

path groups ranked by slack
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      v
high effort on critical groups
medium effort on near-critical
low effort elsewhere

Layer responsibilities

SYNTHESIS OWNERSHIP LAYERS — Timing-Driven Synthesis

layer               owns                          failure mode
----------------    ---------------------------   -------------------------
constraints         clocks/exceptions/policy      fake QoR optimism
mapping             cell choices/structure        depth/fanout regressions
optimization        timing/power tradeoffs        one-metric overfitting
physical-aware      topo/congestion estimates     handoff delta surprises
closure             ECO order/regression          fixes break other corners

Synthesis deep dive

Mapping converts logic intent into real PPA outcomes.

Concept diagram

MAPPING LOOP

boolean net -> library mapping -> optimization -> report and iterate

Metric graph

MAPPING IMPACT

depth reduction   ███████
fanout cleanup    █████
runtime overhead  ███

Reports and artifacts

• mapping summary

• critical path cell list

• fanout/slew report

• library coverage

Mini case study

Cell-heavy critical path improved after restructuring, while blanket buffering had worsened power.

Debug branches

• Depth issue -> structure

• Fanout issue -> buffers

• Library mismatch -> view audit

Senior review question

Ask: what evidence proves this QoR move is real and stable?

Key takeaways

• State exact run context (RTL, SDC, libs, switches) with every QoR claim.

• Re-run timing, area, and power regressions after each synthesis ECO.

Common pitfalls

• Comparing runs with mismatched constraints or library views.

• Timing-only fixes that violate power or area budgets.

• Skipping equivalence checks after structural changes.

Mechanism deep dive

Timing-driven compile focuses optimization where slack is most constrained, balancing global QoR instead of over-optimizing non-critical logic.