Data Validity Debug: Debug Playbook

Debug playbook

Debug Playbook for Data Validity Debug focuses on invalid sample bursts, clipping incidents, stale-data escapes. The goal is to connect observed symptom to boundary mechanism, ownership, and signoff risk.

AMS debug is a hunt for first divergence, not downstream symptom management. Most costly delays come from wrong-owner first actions.

Root-cause tree

ROOT-CAUSE TREE — Data Validity Debug

invalid sample bursts, clipping incidents, stale-data escapes regressed
        |
same silicon / run tags?
   /            \
 no              yes
 |                |
env mismatch    boundary contract or
tag mismatch    true physical issue
 /   \             |
clk   reset      isolate first failing
map   sequence   boundary transition

1. Freeze reproducer: mode, firmware/config, and evidence tags.

2. Find the first boundary signal that diverges.

3. Map divergence to contract clause and owner.

4. Classify failure: contract, sequencing, coupling, package, or tool-view mismatch.

5. Prove mechanism with one reduced reproducer.

6. Apply smallest reversible fix and rerun cross-domain regressions.

Review memo template

STAFF AMS REVIEW MEMO — ADC / DAC Interfaces / Data Validity Debug

1. Symptom
   - Watched metric: invalid sample bursts, clipping incidents, stale-data escapes
   - Failing mode/condition: <power/clock/temp/workload>
   - Boundary under suspicion: <macro/wrapper/interface/lane/island>
   - Repro setup: <sim/emulation/lab + firmware/config tags>

2. Mechanism hypothesis
   - Primary mechanism: Data validity must combine framing correctness, saturation/overflow signaling, and synchronization sanity so software trusts converter samples.
   - Competing hypothesis: <contract gap, sequencing, physical coupling, package, tooling>
   - Missing evidence: <waveform, report, scope/analyzer capture, dashboard snapshot>

3. Proposed action
   - Minimal reversible change: <RTL/config/layout/policy>
   - Expected metric movement: <delta and conditions>
   - Regression risk: timing, noise, power, performance, compatibility

4. Signoff
   - Re-run artifact: validity checker report, sampled trace set, anomaly triage memo
   - Required owners: signal-processing owner, RTL owner, system validation lead
   - Final decision: fix, waive with controls, or escalate

AMS deep dive

Wrapper and sampling contracts determine data trustworthiness.

Concept diagram

CONVERTER DATA FLOW

sampling clock -> wrapper -> sync boundary -> system consumer

Metric graph

INVALID SAMPLE BURSTS

time --->  _|¯¯|__|¯¯¯|____|¯|_

Reports and artifacts

• sample validity ratio

• calibration convergence

• CDC audit

• overflow/stale sample counters

Mini case study

Mode transition changed sample phase and invalidated wrapper framing assumptions.

Debug branches

• Sample timing contract

• Calibration hook behavior

• Wrapper CDC integrity

Senior review question

Ask: what boundary condition proves this topic is actually closed?

Key takeaways

• State boundary, mode, and evidence tag with every claim.

• Always align analog, digital, and physical owners before signoff decisions.

Common pitfalls

• Fixing averages while tails still fail.

• Skipping package/supply evidence in jitter or SerDes issues.

• Shipping with waivers that lack owner and expiration criteria.

Principal AMS review addendum

Data validity must combine framing correctness, saturation/overflow signaling, and synchronization sanity so software trusts converter samples.

Metric: invalid sample bursts, clipping incidents, stale-data escapes