Worked example

Worked Example for SerDes Basics focuses on link-up success, lane BER, lane deskew margin, protocol errors. The goal is to connect observed symptom to boundary mechanism, ownership, and signoff risk.

A stress workload shows link-up success, lane BER, lane deskew margin, protocol errors. The first review mistake is broad blame. A better review tracks one boundary transition, validates contract assumptions, and proves the first failing mechanism in SerDes Basics.

Sequence under inspection

AMS BOUNDARY SEQUENCE — SerDes Basics

analog macro -> wrapper / boundary cell -> synchronizer or sampler -> digital consumer
      |                 |                         |                     |
  analog assumptions    legal voltage/state       clock/reset contract   protocol/data validity

metric under watch: link-up success, lane BER, lane deskew margin, protocol errors

SerDes lane pipeline

parallel data -> encoder -> serializer -> channel -> CDR -> deserializer -> protocol layer

1. Capture tagged waveform/log/report set.

2. Mark mode boundary and first failure timestamp.

3. Map to contract and owner.

4. Compare against SerDes architecture diagram, lane status capture, BER dashboard.

5. Propose one reversible fix and predefine regression matrix.

Did the fix work?

BEFORE / AFTER — SerDes Basics

health score
  ^
  |                     --- target
  |         o regressed
  |               o before fix
  |                    o after bounded fix
  +--------------------------------------> debug iteration

Prove signal quality, timing margin, and integration safety together.

AMS deep dive

SerDes closure requires protocol, training, and SI evidence together.

Concept diagram

SERDES FLOW

training -> equalization -> lane margin -> protocol stability

Metric graph

BER VS EQ

BER
 ^
 |  high  low  high
 +-----------------> EQ setting

Reports and artifacts

• lane BER

• training state transitions

• EQ sweep report

• link retry counters

Mini case study

Link looked protocol-clean but lane margin collapsed under thermal sweep.

Debug branches

• Correlate LTSSM and lane metrics

• Check SI margins

• Review firmware timeout assumptions

Senior review question

Ask: what boundary condition proves this topic is actually closed?

Key takeaways

• State boundary, mode, and evidence tag with every claim.

• Always align analog, digital, and physical owners before signoff decisions.

Common pitfalls

• Fixing averages while tails still fail.

• Skipping package/supply evidence in jitter or SerDes issues.

• Shipping with waivers that lack owner and expiration criteria.

Principal AMS review addendum

SerDes converts parallel data to high-speed serial lanes with CDR, encoding, and lane management; system behavior depends on alignment, training, and channel quality.

Metric: link-up success, lane BER, lane deskew margin, protocol errors