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Course contents

  • How to Use This Course
  • Reading Path
  • CDC/RDC Glossary
  • CDC/RDC Metrics Reference
  • CDC/RDC Interview Prep
  • CDC/RDC Signoff Cheatsheet
  • Clock Domains and Failure Modes8
  • Metastability and Synchronizers16
  • CDC Protocols and Handshakes16
  • Reconvergence and Gray Coding16
  • Reset Domain Crossing16
    • Reset Deassertion CDC
      • Why Deassertion Is the Hazard
      • Reset Synchroniser Structure
      • Recovery and Removal
      • Deassertion Hazards
    • Reset Sequencing
    • RDC Structural Checks
    • Reset Debug Playbook
  • Architecture and Design Rules16
  • CDC Signoff Methodology24
  • RDC Signoff16
  • Debug and Case Studies11
  • CDC and RDC Interview Prep30
  • Capstone: Sign Off a Multi-clock Peripheral4
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‹Reset Domain Crossing
  1. Topics
  2. CDC & RDC
  3. Reset Domain Crossing
  4. Reset Deassertion CDC

Part 5 · Reset Domain Crossing · All levels

Reset Deassertion CDC

Why reset assertion is safe, why release near a clock edge is a recovery/removal hazard, and the synchroniser that fixes it.

  • 4topics
  • 4lessons

Asserting a reset is the easy half: an asynchronous clear forces every flop to a known value with no clock involved. Releasing it is the hazardous half, because the release edge can land arbitrarily close to a clock edge and leave some flops metastable while others come out cleanly.

Lesson

After it you can...

Why deassertion is the hazard

Explain why assertion is safe and release is a recovery/removal problem.

Reset synchroniser structure

Draw the two-flop synchroniser and say what a structural check looks for.

Recovery and removal

State both windows in plain terms and relate them to release timing.

Deassertion hazards

Recognise unsynchronised and combinational releases, and read the release waveform.

Suggested order: the four lessons in listed order. The release waveform in the last lesson is reused by the debug playbook topic.

Check yourself Which half of a reset needs a synchroniser, assertion or release, and why?

Release. Assertion is an asynchronous clear that works without a clock; release is an edge in time that can violate recovery/removal, so it is passed through a synchroniser.

Related topics

  • RTL: Reset Architecture

  • RTL: Reset Domain Crossing

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See also

  • Reset Sequencing
  • RDC Structural Checks
  • Reset Debug Playbook