The bind construct instantiates a verification module inside an RTL module without editing the RTL source. The bound instance sees the target's ports and internal signals, which makes bind the standard delivery mechanism for checkers on design code that DV does not own.
BIND — WHO OWNS WHAT
RTL repo DV repo
────────────── ─────────────────────────
fifo.sv <-- no edits --- fifo_checker.sv
arbiter.sv arb_checker.sv
subsystem_binds.sv:
bind fifo fifo_checker ...
bind arbiter arb_checker ...
|
v elaboration
+------------------------------+
| fifo (every instance) |
| |- ... RTL contents ... |
| └- fifo_checker chk (DV) | <- lives inside the
+------------------------------+ target's scopeLesson | What it covers |
|---|---|
Targets, port maps, and what elaboration produces. | |
Input-only conventions and a valid-ready checker. | |
One bind file per subsystem, ordering, and guards. | |
Parameterized checkers, the checker construct, and releases. | |
Elaboration triage, waves, and bind against inline. |
The target's internal signals: FSM state, counters, and grants resolve by name in the target's scope, with no RTL edits and no fragile hierarchical paths from the testbench.