Review Checklist for High-Speed SI Awareness focuses on SI-induced retries, lane margin, intermittent link drop rate. The goal is to connect observed symptom to boundary mechanism, ownership, and signoff risk.
Boundary assumptions are versioned and signed.
Mode matrix (power/clock/reset/stress) is explicit.
Physical context (floorplan/package/power) is included where relevant.
Metric and artifact references are reproducible.
Waivers have owner, expiry, and mitigation.
Owners signed: package owner, SI/PI owner, SerDes integration owner.
OWNERSHIP MAP — High-Speed SI Awareness
artifact owner
---------------------- -----------------------------
integration artifact package owner
implementation artifact SI/PI owner
signoff artifact SerDes integration owner
Every boundary issue needs a named owner before fixes start.SerDes closure requires protocol, training, and SI evidence together.
SERDES FLOW
training -> equalization -> lane margin -> protocol stabilityBER VS EQ
BER
^
| high low high
+-----------------> EQ settinglane BER
training state transitions
EQ sweep report
link retry counters
Link looked protocol-clean but lane margin collapsed under thermal sweep.
Correlate LTSSM and lane metrics
Check SI margins
Review firmware timeout assumptions
Ask: what boundary condition proves this topic is actually closed?
State boundary, mode, and evidence tag with every claim.
Always align analog, digital, and physical owners before signoff decisions.
Fixing averages while tails still fail.
Skipping package/supply evidence in jitter or SerDes issues.
Shipping with waivers that lack owner and expiration criteria.
At multi-Gbps speeds, package/channel discontinuities and return-path quality convert into jitter and eye closure that appear as digital protocol instability.
Metric: SI-induced retries, lane margin, intermittent link drop rate
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