AMS Interface · All levels

High-Speed SI Awareness: Worked Example

Worked Example for High-Speed SI Awareness.

Worked example

Worked Example for High-Speed SI Awareness focuses on SI-induced retries, lane margin, intermittent link drop rate. The goal is to connect observed symptom to boundary mechanism, ownership, and signoff risk.

A stress workload shows SI-induced retries, lane margin, intermittent link drop rate. The first review mistake is broad blame. A better review tracks one boundary transition, validates contract assumptions, and proves the first failing mechanism in High-Speed SI Awareness.

Sequence under inspection

diagram
AMS BOUNDARY SEQUENCE — High-Speed SI Awareness

analog macro -> wrapper / boundary cell -> synchronizer or sampler -> digital consumer
      |                 |                         |                     |
  analog assumptions    legal voltage/state       clock/reset contract   protocol/data validity

metric under watch: SI-induced retries, lane margin, intermittent link drop rate

Channel SI awareness

diagram
package + board discontinuities -> eye closure/jitter -> retries/link drops
digital symptoms often originate in electrical margin.
  1. Capture tagged waveform/log/report set.

  2. Mark mode boundary and first failure timestamp.

  3. Map to contract and owner.

  4. Compare against channel compliance report, lane margin scan, SI waiver sheet.

  5. Propose one reversible fix and predefine regression matrix.

Did the fix work?

diagram
BEFORE / AFTER — High-Speed SI Awareness

health score
  ^
  |                     --- target
  |         o regressed
  |               o before fix
  |                    o after bounded fix
  +--------------------------------------> debug iteration

Prove signal quality, timing margin, and integration safety together.

AMS deep dive

SerDes closure requires protocol, training, and SI evidence together.

Concept diagram

diagram
SERDES FLOW

training -> equalization -> lane margin -> protocol stability

Metric graph

diagram
BER VS EQ

BER
 ^
 |  high  low  high
 +-----------------> EQ setting

Reports and artifacts

  • lane BER

  • training state transitions

  • EQ sweep report

  • link retry counters

Mini case study

Link looked protocol-clean but lane margin collapsed under thermal sweep.

Debug branches

  • Correlate LTSSM and lane metrics

  • Check SI margins

  • Review firmware timeout assumptions

Senior review question

Ask: what boundary condition proves this topic is actually closed?

Key takeaways

  • State boundary, mode, and evidence tag with every claim.

  • Always align analog, digital, and physical owners before signoff decisions.

Common pitfalls

  • Fixing averages while tails still fail.

  • Skipping package/supply evidence in jitter or SerDes issues.

  • Shipping with waivers that lack owner and expiration criteria.

Principal AMS review addendum

At multi-Gbps speeds, package/channel discontinuities and return-path quality convert into jitter and eye closure that appear as digital protocol instability.

Metric: SI-induced retries, lane margin, intermittent link drop rate