AMS Interface · All levels

Link Training: Inputs & Outputs

Inputs & Outputs for Link Training.

Inputs and outputs contract

Inputs & Outputs for Link Training focuses on training pass rate, time-to-L0, fallback mode frequency. The goal is to connect observed symptom to boundary mechanism, ownership, and signoff risk.

Treat these inputs and outputs as signed interface guarantees. Ambiguity here creates the most expensive integration bugs.

diagram
INPUTS
  - AMS handoff contract and spec revision
  - mode definitions (power/clock/reset/traffic)
  - wrapper and boundary-cell assumptions
  - physical constraints: keepouts, guard, package limits

OUTPUTS
  - mode-tagged metric report
  - owner-signed debug or closure note
  - waiver manifest with expiry and controls
  - release recommendation

Boundary sequence

diagram
AMS BOUNDARY SEQUENCE — Link Training

analog macro -> wrapper / boundary cell -> synchronizer or sampler -> digital consumer
      |                 |                         |                     |
  analog assumptions    legal voltage/state       clock/reset contract   protocol/data validity

metric under watch: training pass rate, time-to-L0, fallback mode frequency

Ownership map

diagram
OWNERSHIP MAP — Link Training

artifact                  owner
----------------------    -----------------------------
integration artifact    firmware owner
implementation artifact PHY owner
signoff artifact        system validation lead

Every boundary issue needs a named owner before fixes start.

AMS deep dive

SerDes closure requires protocol, training, and SI evidence together.

Concept diagram

diagram
SERDES FLOW

training -> equalization -> lane margin -> protocol stability

Metric graph

diagram
BER VS EQ

BER
 ^
 |  high  low  high
 +-----------------> EQ setting

Reports and artifacts

  • lane BER

  • training state transitions

  • EQ sweep report

  • link retry counters

Mini case study

Link looked protocol-clean but lane margin collapsed under thermal sweep.

Debug branches

  • Correlate LTSSM and lane metrics

  • Check SI margins

  • Review firmware timeout assumptions

Senior review question

Ask: what boundary condition proves this topic is actually closed?

Key takeaways

  • State boundary, mode, and evidence tag with every claim.

  • Always align analog, digital, and physical owners before signoff decisions.

Common pitfalls

  • Fixing averages while tails still fail.

  • Skipping package/supply evidence in jitter or SerDes issues.

  • Shipping with waivers that lack owner and expiration criteria.

Principal AMS review addendum

Training protocols establish lane polarity, timing, equalization, and protocol states; digital state machines must synchronize with PHY indications and timeout policies.

Metric: training pass rate, time-to-L0, fallback mode frequency