DenseChip

CDC / RDC · All levels

RDC Methodology: Silicon PPA Impact

Silicon PPA Impact for RDC Methodology.

Silicon PPA and reliability impact

Chip-level reset integration is a system contract, not an IP-local detail.

Area drivers

  • extra synchronizer stages

  • FIFO buffering

  • diagnostic observability logic

Power drivers

  • additional flops

  • always-on reset logic

  • debug monitors

Timing/latency impact

  • added latency through synchronizers

  • pointer synchronization delays

PD consequences

  • placement proximity of sync stages

  • clock/reset tree interactions

Verification burden

  • formal liveness reruns

  • stress simulation matrix

diagram
PPA / RELIABILITY — RDC Methodology
area/power/latency vs reliability margin

Key takeaways

  • Reliability has implementation cost

  • Track that cost explicitly in signoff decisions

Design option reliability curve

diagram
METASTABILITY ENVELOPE — RDC Methodology

probability of unresolved state
  ^
  |\
  | \
  |  \
  |   \
  +------------------------------> settle time
      short settle      long settle

Design lever: more settle time and correct synchronizer topology increase MTBF.

CDC/RDC deep dive

RDC closure must connect IP assumptions to SoC reality.

Concept diagram

diagram
RDC CLOSURE

IP reset intent + SoC sequencing -> structural checks -> dynamic stress -> signoff

Metric graph

diagram
MILESTONE READINESS

M-2 55%
M-1 82%
M0  100%

Reports and artifacts

  • top-level RDC opens

  • reset simulation coverage

  • chip integration blockers

  • waiver backlog

Mini case study

Each IP was locally clean, but top-level sequencing violation created cross-subsystem boot intermittency.

Debug branches

  • Audit subsystem assumptions

  • stress chip-level reset scenarios

  • close ownership gaps

Senior review question

Ask: what evidence proves this risk is closed for silicon, not just tool-clean?

Key takeaways

  • State crossing class, assumptions, and owner with every issue.

  • Run structural and dynamic regressions after each fix.

Common pitfalls

  • Treating all warnings as equivalent risk.

  • Waiving issues without containment evidence.

  • Skipping reset and reconvergence stress after CDC fixes.

Principal CDC/RDC review addendum

RDC methodology treats reset behavior as a first-class asynchronous interface requiring intent capture, structural checks, and targeted dynamic proof.

Metric: reset-domain hazard coverage, unresolved RDC severity count, closure quality

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