Controllability/observability: ability to set and observe internal states.
Compression ratio: reduction of external pattern data via on-chip logic.
ATPG constraints: legal test behavior assumptions.
Diagnosis: mapping fail signatures to likely defect sites.
MBIST/LBIST: embedded memory/logic self-test architectures.
EXTEST/INTEST: boundary scan instruction use cases.
Release signoff: quality + timing + power + process closure decision.