Physical implications of scan, compression, and BIST logic on floorplan, routing, and handoff.
Start with the topic hub for architecture and ownership context.
Use mechanism and reports pages to map assumptions to metrics.
Use debug and worked examples for real closure patterns.
Finish with checklist and silicon impact before release decisions.
scan-chain-physical-effects/ - Scan Chain Physical Effects
test-logic-floorplan/ - Test Logic Floorplan
dft-pd-handoff/ - DFT-PD Handoff
physical-dft-debug/ - Physical DFT Debug
Physical integration quality decides whether DFT architecture survives implementation realities.
PHYSICAL DFT FLOW
chain planning -> floorplan placement -> route -> test timing/power validationROUTING BURDEN
poor chain order -> longer routes -> more hold buffersscan physical wirelength
congestion heatmap
test clock skew
handoff issue tracker
Late scan reorder reduced route detours and eliminated a major shift hold cluster before signoff.
Correlate chain order with congestion
Place compression logic near chain clusters
Keep DFT-PD handoff versioned
Ask: what evidence proves this DFT decision is safe for production?