DFT / ATPG · All levels
Physical DFT Debug: Review Checklist
Review Checklist for Physical DFT Debug.
Review checklist
Review Checklist for Physical DFT Debug focuses on physical root-cause turnaround, repeat DFT route violations, signoff escape risk. The goal is to convert metric movement into mechanism, owner, and release decision.
Run tags and scenario context are explicit.
Constraints and legality assumptions are documented.
Quality, timing, and test-power checks are included.
Diagnosis evidence supports residual-risk decision.
Owners signed: PD owner, STA owner, DFT owner.
Signoff ownership
OWNERSHIP MAP - Physical DFT Debug
artifact owner
---------------- -----------------
architecture/report PD owner
constraints/setup STA owner
physical/test DFT owner
Name an owner for each failing metric cluster.DFT deep dive
Physical integration quality decides whether DFT architecture survives implementation realities.
Concept diagram
PHYSICAL DFT FLOW
chain planning -> floorplan placement -> route -> test timing/power validationMetric graph
ROUTING BURDEN
poor chain order -> longer routes -> more hold buffersReports and artifacts
scan physical wirelength
congestion heatmap
test clock skew
handoff issue tracker
Mini case study
Late scan reorder reduced route detours and eliminated a major shift hold cluster before signoff.
Debug branches
Correlate chain order with congestion
Place compression logic near chain clusters
Keep DFT-PD handoff versioned
Senior review question
Ask: what evidence proves this DFT decision is safe for production?
Key takeaways
State metric, lot/corner context, and pattern tag with every claim.
Treat timing, power, and quality as one signoff problem.
Common pitfalls
Chasing coverage without legality checks.
Ignoring test-power side effects of pattern changes.
Debugging silicon without reproducible tags.
Principal DFT review addendum
Physical DFT debug traces violations to chain ordering, buffering strategy, clock topology, or extraction/view mismatches.
Metric: physical root-cause turnaround, repeat DFT route violations, signoff escape risk