Course map
- 1 lesson
Starts with How to Use This Course
- 1 lesson
Starts with DFT Metrics Reference
- 1 lesson
Starts with DFT Glossary
- 1 lesson
Starts with Reading Path
- 61 lessons
Starts with Scan Cell Architecture: Mechanism
- 61 lessons
Starts with Compression Architectures: Mechanism
- 61 lessons
Starts with Fault Models: Mechanism
- 61 lessons
Starts with MBIST Integration: Mechanism
- 61 lessons
Starts with JTAG TAP Architecture: Mechanism
- 61 lessons
Starts with Test-Mode SDC: Mechanism
- 61 lessons
Starts with Scan Chain Physical Effects: Mechanism
- 61 lessons
Starts with DFT Whiteboard Framework: Mechanism
- 1 lesson
Starts with DFT / ATPG Cheatsheet
About this course
Course promise
This is the production DFT course for silicon teams. It teaches how to architect scan and test flows, close quality metrics, and debug silicon mismatches with strong release discipline.
Scan, compression, ATPG, MBIST/LBIST, and JTAG foundations.
Test timing, power, and physical integration closure.
Diagnosis and yield learning loops.
Every topic follows metric -> mechanism -> evidence -> owner -> regression -> decision.
Course map
Show how the course is organised
scan fundamentals
-> compression and diagnosis
-> ATPG and coverage closure
-> MBIST/LBIST and JTAG
-> test timing/power + physical integration
-> interview and release readinessRelated topics
Section deep dive
DFT signoff needs traceable architecture, constraints, and silicon evidence.
Concept diagram
Show Concept diagram
scan architecture -> pattern generation -> silicon evidenceMetric graph
Show Metric graph
coverage and quality trendReports and artifacts
coverage
pattern count
test timing
diagnosis
Mini case study
Tag every run and artifact to avoid ghost regressions.
Debug branches
Check constraints first
Senior review question
Ask: what evidence proves this DFT decision is safe for production?