DFT / ATPG · All levels

Scenario: Silicon Mismatch: Worked Example

Worked Example for Scenario: Silicon Mismatch.

Worked example

Worked Example for Scenario: Silicon Mismatch focuses on silicon fail reproducibility, diagnosis confidence, lab-to-ATE correlation. The goal is to convert metric movement into mechanism, owner, and release decision.

A release review shows regression on silicon fail reproducibility, diagnosis confidence, lab-to-ATE correlation. The strongest first move is to freeze evidence, isolate one failing bucket, and prove mechanism before changing flow knobs.

Sequence under inspection

diagram
DFT FLOW - Scenario: Silicon Mismatch

scan insertion -> chain stitch -> compression map -> ATPG -> tester apply -> diagnosis
      |                |                |            |             |
 controllability   shift balance    channel use   coverage     silicon correlation

Primary metric: silicon fail reproducibility, diagnosis confidence, lab-to-ATE correlation

Silicon mismatch loop

diagram
ATE fail -> replay -> diagnosis -> lot/corner cluster -> root cause -> corrective action
  1. Capture failing report and exact run tags.

  2. Tag scenario (mode, lot/corner, pattern class).

  3. Trace first dependency that changed.

  4. Compare against failing pattern log, diagnosis trace, silicon correlation memo.

  5. Choose one reversible fix and predefine regression checks.

Did the fix work?

diagram
BEFORE / AFTER - Scenario: Silicon Mismatch

metric quality
  ^
  |                    --- release target
  |      o regressed
  |           o baseline
  |                o after fix
  +-------------------------------> closure iteration

Prove quality, timing, and test-power all moved safely.

DFT deep dive

Senior DFT interviews test tradeoff judgment under imperfect data.

Concept diagram

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INTERVIEW ANSWER LOOP

state metric -> explain mechanism -> request evidence -> propose fix -> list regression

Metric graph

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ANSWER QUALITY

mechanism clarity + ownership clarity + regression discipline

Reports and artifacts

  • whiteboard rubric

  • scenario scorecard

  • trap checklist

  • follow-up depth index

Mini case study

Candidate improved from tool-only answers to mechanism-first narratives by using metric->artifact->decision template.

Debug branches

  • Always state assumptions

  • Name cross-team owners

  • Discuss risk and fallback plan

Senior review question

Ask: what evidence proves this DFT decision is safe for production?

Key takeaways

  • State metric, lot/corner context, and pattern tag with every claim.

  • Treat timing, power, and quality as one signoff problem.

Common pitfalls

  • Chasing coverage without legality checks.

  • Ignoring test-power side effects of pattern changes.

  • Debugging silicon without reproducible tags.

Principal DFT review addendum

Silicon mismatch scenarios test whether engineers can correlate ATPG assumptions, tester setup, and physical behavior before escalating.

Metric: silicon fail reproducibility, diagnosis confidence, lab-to-ATE correlation