Scenario: Silicon Mismatch: Interview Drills

Interview drills

Interview Drills for Scenario: Silicon Mismatch focuses on silicon fail reproducibility, diagnosis confidence, lab-to-ATE correlation. The goal is to convert metric movement into mechanism, owner, and release decision.

PROMPT
You observe silicon fail reproducibility, diagnosis confidence, lab-to-ATE correlation on Scenario: Silicon Mismatch. Walk through diagnosis and release decision.

STRONG ANSWER
1. States context and run tags.
2. Explains mechanism: Silicon mismatch scenarios test whether engineers can correlate ATPG assumptions, tester setup, and physical behavior before escalating.
3. Requests failing pattern log, diagnosis trace, silicon correlation memo.
4. Proposes minimal fix and regression.

WEAK ANSWER
Jumps to tool switches without evidence quality, ownership, or regression plan.

Diagram to draw on the whiteboard

Silicon mismatch loop

ATE fail -> replay -> diagnosis -> lot/corner cluster -> root cause -> corrective action

Root-cause narrative

ROOT-CAUSE TREE - Scenario: Silicon Mismatch

silicon fail reproducibility, diagnosis confidence, lab-to-ATE correlation regresses
        |
  setup changed?
    /        \
  yes         no
  |            |
constraint    silicon or
or ATPG       physical/test path
 /    \          |
SDC   model    chain/clock/power/diagnosis
diff  diff     isolate first failing signature

DFT deep dive

Senior DFT interviews test tradeoff judgment under imperfect data.

Concept diagram

INTERVIEW ANSWER LOOP

state metric -> explain mechanism -> request evidence -> propose fix -> list regression

Metric graph

ANSWER QUALITY

mechanism clarity + ownership clarity + regression discipline

Reports and artifacts

• whiteboard rubric

• scenario scorecard

• trap checklist

• follow-up depth index

Mini case study

Candidate improved from tool-only answers to mechanism-first narratives by using metric->artifact->decision template.

Debug branches

• Always state assumptions

• Name cross-team owners

• Discuss risk and fallback plan

Senior review question

Ask: what evidence proves this DFT decision is safe for production?

Key takeaways

• State metric, lot/corner context, and pattern tag with every claim.

• Treat timing, power, and quality as one signoff problem.

Common pitfalls

• Chasing coverage without legality checks.

• Ignoring test-power side effects of pattern changes.

• Debugging silicon without reproducible tags.

Principal DFT review addendum

Silicon mismatch scenarios test whether engineers can correlate ATPG assumptions, tester setup, and physical behavior before escalating.

Metric: silicon fail reproducibility, diagnosis confidence, lab-to-ATE correlation