DFT / ATPG · All levels
MBIST & LBIST
Memory and logic BIST architecture, repair flows, and BIST signoff criteria.
Section goal
Memory and logic BIST architecture, repair flows, and BIST signoff criteria.
How to study this section
Start with the topic hub for architecture and ownership context.
Use mechanism and reports pages to map assumptions to metrics.
Use debug and worked examples for real closure patterns.
Finish with checklist and silicon impact before release decisions.
Topics
mbist-integration/ - MBIST Integration
memory-repair-flow/ - Memory Repair Flow
lbist-overview/ - LBIST Overview
bist-signoff/ - BIST Signoff
Related topics
DFT deep dive
BIST value is realized only when insertion, diagnosis, and repair are tied to production flow.
Concept diagram
BIST FLOW
insert MBIST/LBIST -> execute -> collect signatures -> diagnose/repair -> signoffMetric graph
REPAIR EFFECT
yield
^
| o pre-repair
| o post-repair
+---------------------> lotReports and artifacts
MBIST insertion coverage
repair signature report
LBIST resistant fault list
BIST release checklist
Mini case study
Fuse programming mismatch blocked repair activation; corrected bring-up script recovered expected yield uplift.
Debug branches
Validate BIST reachability
Correlate fail maps to repair signatures
Audit in-field boot test budget
Senior review question
Ask: what evidence proves this DFT decision is safe for production?