DFT / ATPG · All levels

Memory Repair Flow: Review Checklist

Review Checklist for Memory Repair Flow.

Review checklist

Review Checklist for Memory Repair Flow focuses on repairable fail ratio, spare utilization, post-repair yield uplift. The goal is to convert metric movement into mechanism, owner, and release decision.

  • Run tags and scenario context are explicit.

  • Constraints and legality assumptions are documented.

  • Quality, timing, and test-power checks are included.

  • Diagnosis evidence supports residual-risk decision.

  • Owners signed: memory test owner, yield owner, DFT lead.

Signoff ownership

diagram
OWNERSHIP MAP - Memory Repair Flow

artifact              owner
----------------      -----------------
architecture/report memory test owner
constraints/setup   yield owner
physical/test       DFT lead

Name an owner for each failing metric cluster.

DFT deep dive

BIST value is realized only when insertion, diagnosis, and repair are tied to production flow.

Concept diagram

diagram
BIST FLOW

insert MBIST/LBIST -> execute -> collect signatures -> diagnose/repair -> signoff

Metric graph

diagram
REPAIR EFFECT

yield
  ^
  |      o pre-repair
  |             o post-repair
  +---------------------> lot

Reports and artifacts

  • MBIST insertion coverage

  • repair signature report

  • LBIST resistant fault list

  • BIST release checklist

Mini case study

Fuse programming mismatch blocked repair activation; corrected bring-up script recovered expected yield uplift.

Debug branches

  • Validate BIST reachability

  • Correlate fail maps to repair signatures

  • Audit in-field boot test budget

Senior review question

Ask: what evidence proves this DFT decision is safe for production?

Key takeaways

  • State metric, lot/corner context, and pattern tag with every claim.

  • Treat timing, power, and quality as one signoff problem.

Common pitfalls

  • Chasing coverage without legality checks.

  • Ignoring test-power side effects of pattern changes.

  • Debugging silicon without reproducible tags.

Principal DFT review addendum

Redundancy analysis maps diagnosed memory defects to spare rows/columns, trading area overhead for yield recovery.

Metric: repairable fail ratio, spare utilization, post-repair yield uplift