DFT / ATPG · All levels

BIST Signoff: Interview Drills

Interview Drills for BIST Signoff.

Interview drills

Interview Drills for BIST Signoff focuses on MBIST/LBIST pass criteria, startup test time, in-field diagnostic readiness. The goal is to convert metric movement into mechanism, owner, and release decision.

diagram
PROMPT
You observe MBIST/LBIST pass criteria, startup test time, in-field diagnostic readiness on BIST Signoff. Walk through diagnosis and release decision.

STRONG ANSWER
1. States context and run tags.
2. Explains mechanism: BIST signoff verifies architecture correctness, quality targets, safety intent, and production programmability before release.
3. Requests BIST signoff checklist, startup test profile, release approval memo.
4. Proposes minimal fix and regression.

WEAK ANSWER
Jumps to tool switches without evidence quality, ownership, or regression plan.

Diagram to draw on the whiteboard

BIST flow

diagram
BIST insertion -> test run -> diagnosis/repair -> signoff

Root-cause narrative

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ROOT-CAUSE TREE - BIST Signoff

MBIST/LBIST pass criteria, startup test time, in-field diagnostic readiness regresses
        |
  setup changed?
    /        \
  yes         no
  |            |
constraint    silicon or
or ATPG       physical/test path
 /    \          |
SDC   model    chain/clock/power/diagnosis
diff  diff     isolate first failing signature

DFT deep dive

BIST value is realized only when insertion, diagnosis, and repair are tied to production flow.

Concept diagram

diagram
BIST FLOW

insert MBIST/LBIST -> execute -> collect signatures -> diagnose/repair -> signoff

Metric graph

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REPAIR EFFECT

yield
  ^
  |      o pre-repair
  |             o post-repair
  +---------------------> lot

Reports and artifacts

  • MBIST insertion coverage

  • repair signature report

  • LBIST resistant fault list

  • BIST release checklist

Mini case study

Fuse programming mismatch blocked repair activation; corrected bring-up script recovered expected yield uplift.

Debug branches

  • Validate BIST reachability

  • Correlate fail maps to repair signatures

  • Audit in-field boot test budget

Senior review question

Ask: what evidence proves this DFT decision is safe for production?

Key takeaways

  • State metric, lot/corner context, and pattern tag with every claim.

  • Treat timing, power, and quality as one signoff problem.

Common pitfalls

  • Chasing coverage without legality checks.

  • Ignoring test-power side effects of pattern changes.

  • Debugging silicon without reproducible tags.

Principal DFT review addendum

BIST signoff verifies architecture correctness, quality targets, safety intent, and production programmability before release.

Metric: MBIST/LBIST pass criteria, startup test time, in-field diagnostic readiness