DFT / ATPG · All levels
Diagnosis & Yield Learning: Pitfalls & Red Flags
Pitfalls & Red Flags for Diagnosis & Yield Learning.
Pitfalls and red flags
Pitfalls & Red Flags for Diagnosis & Yield Learning focuses on diagnosis resolution, top failing buckets, yield learning turnaround. The goal is to convert metric movement into mechanism, owner, and release decision.
Coverage improves while diagnosis quality degrades.
Pattern count drops but test escapes rise.
Shift timing passes while capture timing regresses.
Power fixes alter quality behavior without retest.
Owner handoff is unclear for recurring failures.
Layer responsibility check
DFT OWNERSHIP LAYERS - Diagnosis & Yield Learning
layer owns failure mode
---------------- -------------------------- -------------------------
rtl/architecture scanability hooks uncontrollable logic
atpg/constraints legal pattern intent aborts, low coverage
physical/clocking chain route + test clocks shift hold/timing escapes
tester/program pattern apply integrity false binning / bad fails
quality signoff release criteria escapes or schedule slipDFT deep dive
Compression saves tester time only when diagnosis observability remains credible.
Concept diagram
COMPRESSION LOOP
EDT/decompressor -> compressed patterns -> compactor responses -> diagnosisMetric graph
PATTERN vs COVERAGE
coverage up -> pattern count up
compression up -> pattern count down (until aliasing risk)Reports and artifacts
compression ratio dashboard
pattern count trend
X-source report
diagnosis bucket summary
Mini case study
Compactor overflow plus unknown inflation caused false diagnosis; masking policy and channel map corrected.
Debug branches
Separate X issues from silicon defects
Replay failing patterns uncompressed
Track tester memory budget
Senior review question
Ask: what evidence proves this DFT decision is safe for production?
Key takeaways
State metric, lot/corner context, and pattern tag with every claim.
Treat timing, power, and quality as one signoff problem.
Common pitfalls
Chasing coverage without legality checks.
Ignoring test-power side effects of pattern changes.
Debugging silicon without reproducible tags.
Principal DFT review addendum
Fail logs and diagnosis map failing signatures back to likely defect sites, enabling systematic yield learning loops with design and process teams.
Metric: diagnosis resolution, top failing buckets, yield learning turnaround