DFT / ATPG ยท All levels
Diagnosis & Yield Learning: Theory Deep Dive
Theory Deep Dive for Diagnosis & Yield Learning.
Foundational theory
Diagnosis & Yield Learning is central to Compression & Diagnosis. Fail logs and diagnosis map failing signatures back to likely defect sites, enabling systematic yield learning loops with design and process teams. Senior DFT engineers tie metric movement to architecture assumptions, constraints, and silicon evidence rather than isolated tool output.
Core concepts explained
Fail logs and diagnosis map failing signatures back to likely defect sites, enabling systematic yield learning loops with design and process teams.
Primary metric: diagnosis resolution, top failing buckets, yield learning turnaround
Primary artifact: diagnosis report, fail-log bucket table, yield pareto dashboard
Owners: product test owner, yield engineer, DFT lead
Controllability and observability must be explicit
Production-quality requires reproducible pattern and tester tags
Why this matters at release
At release, Diagnosis & Yield Learning issues can create coverage escapes, unstable production bins, or long debug loops. Compression is a quality-and-cost optimization, not just a ratio target.
Mental model
fail logs -> suspect list -> diagnosis buckets -> yield pareto -> design/process action
The loop is valuable only with consistent signatures and tagging.Worked intuition
Name failing metric and scenario context (mode, lot/corner, program).
Open diagnosis resolution, top failing buckets, yield learning turnaround trend and isolate dominant failing bucket.
Trace architecture assumptions and legality constraints.
Check compression, clocking, and unknown handling dependencies.
Collect diagnosis report, fail-log bucket table, yield pareto dashboard and confirm run tags.
Classify issue: model/constraint, physical/test setup, or real defect signal.
Propose minimal fix and list timing/power/quality regression checks.
Common misconceptions
Coverage percent alone proves release readiness.
More compression always means better outcome.
Silicon mismatch can be debugged without pattern/tester traceability.
Shift timing and test power can be signed independently.
Visual reinforcement
Diagnosis feedback loop
fail logs -> suspect list -> diagnosis buckets -> yield pareto -> design/process action
The loop is valuable only with consistent signatures and tagging.Layer responsibilities
DFT OWNERSHIP LAYERS - Diagnosis & Yield Learning
layer owns failure mode
---------------- -------------------------- -------------------------
rtl/architecture scanability hooks uncontrollable logic
atpg/constraints legal pattern intent aborts, low coverage
physical/clocking chain route + test clocks shift hold/timing escapes
tester/program pattern apply integrity false binning / bad fails
quality signoff release criteria escapes or schedule slipDFT deep dive
Compression saves tester time only when diagnosis observability remains credible.
Concept diagram
COMPRESSION LOOP
EDT/decompressor -> compressed patterns -> compactor responses -> diagnosisMetric graph
PATTERN vs COVERAGE
coverage up -> pattern count up
compression up -> pattern count down (until aliasing risk)Reports and artifacts
compression ratio dashboard
pattern count trend
X-source report
diagnosis bucket summary
Mini case study
Compactor overflow plus unknown inflation caused false diagnosis; masking policy and channel map corrected.
Debug branches
Separate X issues from silicon defects
Replay failing patterns uncompressed
Track tester memory budget
Senior review question
Ask: what evidence proves this DFT decision is safe for production?
Key takeaways
State metric, lot/corner context, and pattern tag with every claim.
Treat timing, power, and quality as one signoff problem.
Common pitfalls
Chasing coverage without legality checks.
Ignoring test-power side effects of pattern changes.
Debugging silicon without reproducible tags.
Theory reinforcement
Compression is a quality-and-cost optimization, not just a ratio target.