DFT / ATPG · All levels
Compression Debug: Interview Drills
Interview Drills for Compression Debug.
Interview drills
Interview Drills for Compression Debug focuses on unknown/X inflation, compactor overflow incidents, pattern replay success rate. The goal is to convert metric movement into mechanism, owner, and release decision.
PROMPT
You observe unknown/X inflation, compactor overflow incidents, pattern replay success rate on Compression Debug. Walk through diagnosis and release decision.
STRONG ANSWER
1. States context and run tags.
2. Explains mechanism: Compression debug isolates whether failures come from EDT wiring, X-masking policy, clocking, or ATPG assumptions before blaming silicon defects.
3. Requests X-source trace, compactor status report, pattern replay logs.
4. Proposes minimal fix and regression.
WEAK ANSWER
Jumps to tool switches without evidence quality, ownership, or regression plan.Diagram to draw on the whiteboard
Compression flow
compression architecture -> ATPG patterns -> fail logs -> diagnosis -> yield learningRoot-cause narrative
ROOT-CAUSE TREE - Compression Debug
unknown/X inflation, compactor overflow incidents, pattern replay success rate regresses
|
setup changed?
/ \
yes no
| |
constraint silicon or
or ATPG physical/test path
/ \ |
SDC model chain/clock/power/diagnosis
diff diff isolate first failing signatureDFT deep dive
Compression saves tester time only when diagnosis observability remains credible.
Concept diagram
COMPRESSION LOOP
EDT/decompressor -> compressed patterns -> compactor responses -> diagnosisMetric graph
PATTERN vs COVERAGE
coverage up -> pattern count up
compression up -> pattern count down (until aliasing risk)Reports and artifacts
compression ratio dashboard
pattern count trend
X-source report
diagnosis bucket summary
Mini case study
Compactor overflow plus unknown inflation caused false diagnosis; masking policy and channel map corrected.
Debug branches
Separate X issues from silicon defects
Replay failing patterns uncompressed
Track tester memory budget
Senior review question
Ask: what evidence proves this DFT decision is safe for production?
Key takeaways
State metric, lot/corner context, and pattern tag with every claim.
Treat timing, power, and quality as one signoff problem.
Common pitfalls
Chasing coverage without legality checks.
Ignoring test-power side effects of pattern changes.
Debugging silicon without reproducible tags.
Principal DFT review addendum
Compression debug isolates whether failures come from EDT wiring, X-masking policy, clocking, or ATPG assumptions before blaming silicon defects.
Metric: unknown/X inflation, compactor overflow incidents, pattern replay success rate