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Course contents

  • How to Use This Course
  • DFT Metrics Reference
  • DFT Glossary
  • Reading Path
  • Scan Fundamentals61
  • Compression & Diagnosis61
  • ATPG & Pattern Generation61
  • MBIST & LBIST61
  • Boundary Scan & JTAG61
  • Test Timing & Power61
  • DFT Physical Integration61
    • Scan Chain Physical Effects
    • Test Logic Floorplan
    • DFT-PD Handoff
      • DFT-PD Handoff: Mechanism
      • DFT-PD Handoff: Inputs & Outputs
      • DFT-PD Handoff: Reports & Metrics
      • DFT-PD Handoff: Debug Playbook
      • DFT-PD Handoff: Worked Example
      • DFT-PD Handoff: Pitfalls & Red Flags
      • DFT-PD Handoff: Interview Drills
      • DFT-PD Handoff: Review Checklist
      • DFT-PD Handoff: Theory Deep Dive
      • DFT-PD Handoff: Design Space
      • DFT-PD Handoff: Expanded Case Study
      • DFT-PD Handoff: Step-by-Step Walkthrough
      • DFT-PD Handoff: Comparison Matrix
      • DFT-PD Handoff: Software / Programmer View
      • DFT-PD Handoff: Silicon PPA Impact
    • Physical DFT Debug
    • DFT Physical Integration: Tricky Q&A
  • DFT Interview Prep61
  • DFT / ATPG Cheatsheet
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‹DFT-PD Handoff
  1. Topics
  2. Design for Test
  3. DFT Physical Integration
  4. DFT-PD Handoff
  5. DFT-PD Handoff: Worked Example

DFT / ATPG · All levels

DFT-PD Handoff: Worked Example

Worked Example for DFT-PD Handoff.

On this page

    Worked example

    Worked Example for DFT-PD Handoff focuses on handoff issue count, late-stage DFT ECO volume, closure turnaround. The goal is to convert metric movement into mechanism, owner, and release decision.

    A release review shows regression on handoff issue count, late-stage DFT ECO volume, closure turnaround. The strongest first move is to freeze evidence, isolate one failing bucket, and prove mechanism before changing flow knobs.

    Sequence under inspection

    Diagram
    DFT FLOW - DFT-PD Handoff
    
    scan insertion -> chain stitch -> compression map -> ATPG -> tester apply -> diagnosis
          |                |                |            |             |
     controllability   shift balance    channel use   coverage     silicon correlation
    
    Primary metric: handoff issue count, late-stage DFT ECO volume, closure turnaround

    DFT-PD handoff checklist

    Diagram
    chain constraints + test clocks + legal placements + signoff criteria
                          -> PD implementation contract
    1. Capture failing report and exact run tags.

    2. Tag scenario (mode, lot/corner, pattern class).

    3. Trace first dependency that changed.

    4. Compare against handoff checklist, chain constraint package, ownership matrix.

    5. Choose one reversible fix and predefine regression checks.

    Did the fix work?

    Diagram
    BEFORE / AFTER - DFT-PD Handoff
    
    metric quality
      ^
      |                    --- release target
      |      o regressed
      |           o baseline
      |                o after fix
      +-------------------------------> closure iteration
    
    Prove quality, timing, and test-power all moved safely.

    DFT deep dive

    Physical integration quality decides whether DFT architecture survives implementation realities.

    Concept diagram

    Diagram
    PHYSICAL DFT FLOW
    
    chain planning -> floorplan placement -> route -> test timing/power validation

    Metric graph

    Diagram
    ROUTING BURDEN
    
    poor chain order -> longer routes -> more hold buffers

    Reports and artifacts

    • scan physical wirelength

    • congestion heatmap

    • test clock skew

    • handoff issue tracker

    Mini case study

    Late scan reorder reduced route detours and eliminated a major shift hold cluster before signoff.

    Debug branches

    • Correlate chain order with congestion

    • Place compression logic near chain clusters

    • Keep DFT-PD handoff versioned

    Senior review question

    Ask: what evidence proves this DFT decision is safe for production?

    Key takeaways

    • State metric, lot/corner context, and pattern tag with every claim.

    • Treat timing, power, and quality as one signoff problem.

    Common pitfalls

    • Chasing coverage without legality checks.

    • Ignoring test-power side effects of pattern changes.

    • Debugging silicon without reproducible tags.

    Principal DFT review addendum

    Clear DFT-to-PD contracts for chain rules, test clocks, and legal placement constraints prevent expensive late-stage churn.

    Metric: handoff issue count, late-stage DFT ECO volume, closure turnaround

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    See also

    • DFT-PD Handoff: Mechanism
    • DFT-PD Handoff: Inputs & Outputs
    • DFT-PD Handoff: Reports & Metrics