DFT-PD Handoff: Debug Playbook

Debug playbook

Debug Playbook for DFT-PD Handoff focuses on handoff issue count, late-stage DFT ECO volume, closure turnaround. The goal is to convert metric movement into mechanism, owner, and release decision.

Debug aims to find the first incorrect assumption, not the loudest downstream symptom. Start with reproducibility and ownership.

Root-cause tree

ROOT-CAUSE TREE - DFT-PD Handoff

handoff issue count, late-stage DFT ECO volume, closure turnaround regresses
        |
  setup changed?
    /        \
  yes         no
  |            |
constraint    silicon or
or ATPG       physical/test path
 /    \          |
SDC   model    chain/clock/power/diagnosis
diff  diff     isolate first failing signature

1. Freeze run tags for patterns, constraints, and tester setup.

2. Isolate first failing metric bucket and scenario.

3. Classify failure source: model, constraints, physical, or silicon.

4. Prove mechanism with one reduced replay or targeted run.

5. Apply smallest owner-controlled fix.

6. Re-run timing, power, and quality regression matrix.

Review memo template

STAFF DFT REVIEW MEMO - DFT Physical Integration / DFT-PD Handoff

1. Symptom
   - Watched metric: handoff issue count, late-stage DFT ECO volume, closure turnaround
   - Failing scenario: <mode/lot/corner/program>
   - Pattern class: <scan/transition/compressed/BIST/JTAG>
   - Tags: <constraints, patterns, tester program, netlist>

2. Mechanism hypothesis
   - Primary mechanism: Clear DFT-to-PD contracts for chain rules, test clocks, and legal placement constraints prevent expensive late-stage churn.
   - Competing hypothesis: <constraint issue, model issue, physical issue, silicon issue>
   - Missing evidence: <report, replay, diagnosis trace>

3. Proposed action
   - Minimal reversible change: <constraint fix, architecture tweak, pattern update>
   - Expected metric movement: <delta>
   - Regression risk: timing, power, quality, schedule

4. Signoff
   - Re-run artifact: handoff checklist, chain constraint package, ownership matrix
   - Required owners: DFT lead, PD lead, program manager
   - Final decision: release, waive, rollback, or escalate

DFT deep dive

Physical integration quality decides whether DFT architecture survives implementation realities.

Concept diagram

PHYSICAL DFT FLOW

chain planning -> floorplan placement -> route -> test timing/power validation

Metric graph

ROUTING BURDEN

poor chain order -> longer routes -> more hold buffers

Reports and artifacts

• scan physical wirelength

• congestion heatmap

• test clock skew

• handoff issue tracker

Mini case study

Late scan reorder reduced route detours and eliminated a major shift hold cluster before signoff.

Debug branches

• Correlate chain order with congestion

• Place compression logic near chain clusters

• Keep DFT-PD handoff versioned

Senior review question

Ask: what evidence proves this DFT decision is safe for production?

Key takeaways

• State metric, lot/corner context, and pattern tag with every claim.

• Treat timing, power, and quality as one signoff problem.

Common pitfalls

• Chasing coverage without legality checks.

• Ignoring test-power side effects of pattern changes.

• Debugging silicon without reproducible tags.

Principal DFT review addendum

Clear DFT-to-PD contracts for chain rules, test clocks, and legal placement constraints prevent expensive late-stage churn.

Metric: handoff issue count, late-stage DFT ECO volume, closure turnaround