Use these drills after completing all topics in Test Timing & Power. Answer with metric, mechanism, evidence, owner, and regression plan.
[INT][DFT][TEST-TIMING-POWER]
Q: Why must shift and capture timing be reviewed separately?
A:
Shift is hold-dominant and capture is setup-dominant; passing one does not imply passing the other.
FOLLOW-UP TRAP: Single timing report signoff.[INT][DFT][TEST-TIMING-POWER]
Q: Patterns fail only on hot lots in production. First hypothesis?
A:
Test-power and IR sensitivity under production conditions, not just ATPG correctness.
FOLLOW-UP TRAP: Blaming ATPG quality without power evidence.METRIC -> MECHANISM -> EVIDENCE -> FIX -> REGRESSIONTEST SIGNOFF LOOP
test SDC -> shift/capture timing -> power-aware ATPG -> IR validation -> releaseState metric, lot/corner context, and pattern tag with every claim.
Treat timing, power, and quality as one signoff problem.
Chasing coverage without legality checks.
Ignoring test-power side effects of pattern changes.
Debugging silicon without reproducible tags.