DFT / ATPG · All levels

Test Timing & Power: Tricky Q&A

Senior interview and review questions for Test Timing & Power.

Section Q&A bank

Use these drills after completing all topics in Test Timing & Power. Answer with metric, mechanism, evidence, owner, and regression plan.

Why must shift and capture timing be reviewed separately?

diagram

[INT][DFT][TEST-TIMING-POWER]

Q: Why must shift and capture timing be reviewed separately?

A:
Shift is hold-dominant and capture is setup-dominant; passing one does not imply passing the other.

FOLLOW-UP TRAP: Single timing report signoff.

Patterns fail only on hot lots in production. First hypothesis?

diagram

[INT][DFT][TEST-TIMING-POWER]

Q: Patterns fail only on hot lots in production. First hypothesis?

A:
Test-power and IR sensitivity under production conditions, not just ATPG correctness.

FOLLOW-UP TRAP: Blaming ATPG quality without power evidence.

Q&A drill guide

diagram

METRIC -> MECHANISM -> EVIDENCE -> FIX -> REGRESSION

Sketch while answering

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TEST SIGNOFF LOOP

test SDC -> shift/capture timing -> power-aware ATPG -> IR validation -> release

Key takeaways

State metric, lot/corner context, and pattern tag with every claim.
Treat timing, power, and quality as one signoff problem.

Common pitfalls

Chasing coverage without legality checks.
Ignoring test-power side effects of pattern changes.
Debugging silicon without reproducible tags.

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