DFT / ATPG · All levels
Pattern Signoff: Expanded Case Study
Expanded Case Study for Pattern Signoff.
Extended case study
Release review: final coverage, escaped fault estimate, tester-ready pattern quality regresses after a test-flow update touching Pattern Signoff.
Background
Team had prior signoff, then a new program/config introduced regressions in selected buckets.
Symptoms observed
final coverage, escaped fault estimate, tester-ready pattern quality regression
Mismatch between simulation and tester
Escalation without clear owner
Investigation timeline
Hour 0: freeze pattern set, constraints, and tester program tags
Hour 1: isolate first failing bucket by mode/lot
Hour 2: verify legality and constraints assumptions
Hour 3: correlate with physical/timing/power context
Hour 4: choose minimal reversible fix
Hour 5: run full signoff regression matrix
Hour 6: publish decision memo and owners
Root cause
Root cause tied to Pattern Signoff: Pattern signoff validates that pattern sets meet quality, runtime, and tester format requirements before tapeout and production handoff.
Fix and validation
Apply bounded fix with owner
Re-run pattern signoff memo, tester format validation report, quality checklist
Re-validate quality, timing, and test power
Lessons learned
Tag every run artifact
Mechanism first, command second
Close with explicit release decision
CASE STUDY - Pattern Signoff
baseline metric / regressed metric / post-fix metricSequence under stress
DFT FLOW - Pattern Signoff
scan insertion -> chain stitch -> compression map -> ATPG -> tester apply -> diagnosis
| | | | |
controllability shift balance channel use coverage silicon correlation
Primary metric: final coverage, escaped fault estimate, tester-ready pattern qualityDFT deep dive
ATPG quality comes from fault model choice plus legal constraints, not raw pattern volume alone.
Concept diagram
ATPG FLOW
fault model -> constraints -> generation -> simulation -> coverage closure -> signoffMetric graph
COVERAGE GAP
target coverage
^
| o before closure
| o after fixes
+---------------------> iterationReports and artifacts
fault model coverage
untestable class report
constraint legality errors
pattern signoff memo
Mini case study
Transition coverage stalled due to clock constraints mismatch; updated at-speed capture definitions recovered target.
Debug branches
Classify untestable faults
Diff ATPG constraints each run
Pair coverage with pattern budget
Senior review question
Ask: what evidence proves this DFT decision is safe for production?
Key takeaways
State metric, lot/corner context, and pattern tag with every claim.
Treat timing, power, and quality as one signoff problem.
Common pitfalls
Chasing coverage without legality checks.
Ignoring test-power side effects of pattern changes.
Debugging silicon without reproducible tags.
Principal DFT review addendum
Pattern signoff validates that pattern sets meet quality, runtime, and tester format requirements before tapeout and production handoff.
Metric: final coverage, escaped fault estimate, tester-ready pattern quality