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ATPG Constraints: Debug Playbook

Debug Playbook for ATPG Constraints.

Debug playbook

Debug Playbook for ATPG Constraints focuses on constraint consistency errors, illegal state count, pattern abort rate. The goal is to convert metric movement into mechanism, owner, and release decision.

Debug aims to find the first incorrect assumption, not the loudest downstream symptom. Start with reproducibility and ownership.

Root-cause tree

diagram
ROOT-CAUSE TREE - ATPG Constraints

constraint consistency errors, illegal state count, pattern abort rate regresses
        |
  setup changed?
    /        \
  yes         no
  |            |
constraint    silicon or
or ATPG       physical/test path
 /    \          |
SDC   model    chain/clock/power/diagnosis
diff  diff     isolate first failing signature
  1. Freeze run tags for patterns, constraints, and tester setup.

  2. Isolate first failing metric bucket and scenario.

  3. Classify failure source: model, constraints, physical, or silicon.

  4. Prove mechanism with one reduced replay or targeted run.

  5. Apply smallest owner-controlled fix.

  6. Re-run timing, power, and quality regression matrix.

Review memo template

diagram
STAFF DFT REVIEW MEMO - ATPG & Pattern Generation / ATPG Constraints

1. Symptom
   - Watched metric: constraint consistency errors, illegal state count, pattern abort rate
   - Failing scenario: <mode/lot/corner/program>
   - Pattern class: <scan/transition/compressed/BIST/JTAG>
   - Tags: <constraints, patterns, tester program, netlist>

2. Mechanism hypothesis
   - Primary mechanism: ATPG constraints encode legal test-mode behavior, clocks, resets, and masks so generated patterns are both executable and meaningful.
   - Competing hypothesis: <constraint issue, model issue, physical issue, silicon issue>
   - Missing evidence: <report, replay, diagnosis trace>

3. Proposed action
   - Minimal reversible change: <constraint fix, architecture tweak, pattern update>
   - Expected metric movement: <delta>
   - Regression risk: timing, power, quality, schedule

4. Signoff
   - Re-run artifact: ATPG constraint file, legality checker log, constraint diff report
   - Required owners: ATPG owner, RTL owner, DFT owner
   - Final decision: release, waive, rollback, or escalate

DFT deep dive

ATPG quality comes from fault model choice plus legal constraints, not raw pattern volume alone.

Concept diagram

diagram
ATPG FLOW

fault model -> constraints -> generation -> simulation -> coverage closure -> signoff

Metric graph

diagram
COVERAGE GAP

target coverage
  ^
  |      o before closure
  |          o after fixes
  +---------------------> iteration

Reports and artifacts

  • fault model coverage

  • untestable class report

  • constraint legality errors

  • pattern signoff memo

Mini case study

Transition coverage stalled due to clock constraints mismatch; updated at-speed capture definitions recovered target.

Debug branches

  • Classify untestable faults

  • Diff ATPG constraints each run

  • Pair coverage with pattern budget

Senior review question

Ask: what evidence proves this DFT decision is safe for production?

Key takeaways

  • State metric, lot/corner context, and pattern tag with every claim.

  • Treat timing, power, and quality as one signoff problem.

Common pitfalls

  • Chasing coverage without legality checks.

  • Ignoring test-power side effects of pattern changes.

  • Debugging silicon without reproducible tags.

Principal DFT review addendum

ATPG constraints encode legal test-mode behavior, clocks, resets, and masks so generated patterns are both executable and meaningful.

Metric: constraint consistency errors, illegal state count, pattern abort rate