Worked example

Worked Example for Scan Chain Physical Effects focuses on scan wirelength, congestion from chain ordering, hold buffer overhead. The goal is to convert metric movement into mechanism, owner, and release decision.

A release review shows regression on scan wirelength, congestion from chain ordering, hold buffer overhead. The strongest first move is to freeze evidence, isolate one failing bucket, and prove mechanism before changing flow knobs.

Sequence under inspection

DFT FLOW - Scan Chain Physical Effects

scan insertion -> chain stitch -> compression map -> ATPG -> tester apply -> diagnosis
      |                |                |            |             |
 controllability   shift balance    channel use   coverage     silicon correlation

Primary metric: scan wirelength, congestion from chain ordering, hold buffer overhead

Physical chain consequences

chain order -> wirelength -> congestion -> hold buffers -> shift timing risk

1. Capture failing report and exact run tags.

2. Tag scenario (mode, lot/corner, pattern class).

3. Trace first dependency that changed.

4. Compare against scan physical report, wirelength histogram, congestion heatmap.

5. Choose one reversible fix and predefine regression checks.

Did the fix work?

BEFORE / AFTER - Scan Chain Physical Effects

metric quality
  ^
  |                    --- release target
  |      o regressed
  |           o baseline
  |                o after fix
  +-------------------------------> closure iteration

Prove quality, timing, and test-power all moved safely.

DFT deep dive

Physical integration quality decides whether DFT architecture survives implementation realities.

Concept diagram

PHYSICAL DFT FLOW

chain planning -> floorplan placement -> route -> test timing/power validation

Metric graph

ROUTING BURDEN

poor chain order -> longer routes -> more hold buffers

Reports and artifacts

• scan physical wirelength

• congestion heatmap

• test clock skew

• handoff issue tracker

Mini case study

Late scan reorder reduced route detours and eliminated a major shift hold cluster before signoff.

Debug branches

• Correlate chain order with congestion

• Place compression logic near chain clusters

• Keep DFT-PD handoff versioned

Senior review question

Ask: what evidence proves this DFT decision is safe for production?

Key takeaways

• State metric, lot/corner context, and pattern tag with every claim.

• Treat timing, power, and quality as one signoff problem.

Common pitfalls

• Chasing coverage without legality checks.

• Ignoring test-power side effects of pattern changes.

• Debugging silicon without reproducible tags.

Principal DFT review addendum

Logical chain order interacts with placement and routing; poor ordering inflates wirelength, congestion, and shift hold fixes.

Metric: scan wirelength, congestion from chain ordering, hold buffer overhead