Interviewers trust candidates who compute. These are the ten standard numeric exercises of a SoC interview, each as a timed drill: the formula, a worked NanoSoC answer, a runnable checker that asserts the result, and a variation to try before looking at the next lesson. Run each checker from a clean copy, then change one input and predict the output before running again. Constants marked illustrative are teaching values, not process data; synchroniser constants are inputs, never facts.
Lesson | After it you can... |
|---|---|
Size a region, budget a link with 4 KB splits, and bound an access latency from memory. | |
Time a reset release, cross a ratio, bound an interrupt, and count pads with SSN. | |
Roll up a power budget, size a FIFO from Little's law, and price a synchroniser in MTBF. |
Suggested order: top to bottom, one sitting per lesson with a timer. Ten minutes per drill: two to write the formula, five to compute, three to run the checker and try the variation. For the bandwidth theory behind the second lesson's drills see Peak and Sustained Bandwidth and Little's Law.
Because the drill trains the computation, not the reading: typing the numbers and watching the assert pass is what makes 361.4 available under pressure. Reading produces recognition; typing produces recall.