Revision sheets drawn from the course. Each line points back to the lesson that derives it.
setup slack = (capture edge + capture latency) - setup time - uncertainty - (launch latency + clock-to-Q + path delay)
hold slack = (launch latency + minimum clock-to-Q + minimum path delay) - (capture latency + hold time + uncertainty)
half-cycle path: capture edge = launch edge + T/2
CRPR credit = shared clock delay * (late derate - early derate)
recovery slack = (capture edge + capture latency - recovery) - (launch latency + max release arrival) ; removal slack = (launch latency + min release arrival) - (capture latency + removal)
AND gate enable: setup to the next rising edge, hold to the falling edge (enable changes while clock is low)
latch borrowing = max(0, data arrival - opening edge) ; maximum = transparent window - setup
pulse width slack = phase width at the pin - minimum pulse width ; period slack = period at the pin - minimum periodCommand | Defines |
|---|---|
create_clock | A clock at a source pin or port with a period and waveform |
create_generated_clock | A clock derived from another (divide, multiply, invert), keeping the relationship |
set_clock_uncertainty | Margin for jitter and skew on setup or hold |
set_clock_latency | Source or network latency for an ideal clock |
set_input_delay / set_output_delay | External arrival or requirement at ports relative to a clock |
set_false_path | Paths that are not timed; count what it covers |
set_multicycle_path | Setup N cycles; hold normally N-1 on the same clock |
set_max_delay / set_min_delay | A fixed delay limit on a path, independent of the clock edge |
set_case_analysis | A constant value on a pin: defines a mode, disables paths that cannot toggle |
set_clock_groups | Clocks that never interact (asynchronous or exclusive) |
set_driving_cell / set_load | Input drive and output load environment |
Setup is worst in the slowest conditions, hold in the fastest; at low voltage check cold for setup and hot for hold (temperature inversion).
Count the matrix: modes × conditions × interconnect corners; justify every pruned scenario with a tolerance.
Every library in a scenario matches its corner; unit and corner-order sanity checks on loaded data.
Interconnect: cworst/cbest for driver-dominated nets, rcworst/rcbest for wire-dominated ones.
Setup: late on launch clock and data, early on capture clock. Hold: the opposite.
Flat OCV is pessimistic for deep paths; depth-based credits averaging; statistical sees noisy cells.
Every margin has an owner and evidence; normalise trends to a baseline margin.
Coverage and exception audit before anything else.
Screen endpoints by setup plus hold slack in the same scenario; across corners the setup cost of inserted delay is larger, so the same-corner sum is only a screen. Negative sums need structural fixes.
Fix setup on shared segments first; then hold by delay inside the setup slack; rerun every scenario.
Skew only inside its computed window, per corner.
Verify with a before-and-after endpoint table; batch conflicting ECOs separately.
Scenario, check type, path group.
Launch and capture clock edges and latencies.
Uncertainty and derates; CRPR credit.
Data path increments: where did the delay go?
Slack, then the same endpoint in the other scenarios.
What the summary does not cover: unconstrained endpoints, exceptions, filters.
3 (N - 1).