Agent Architecture Hub: Wrapper, Wiring, and Debug Discipline

Overview

A UVM agent architecture is the reusable boundary around one interface: it packages active stimulus and passive observability into one component contract. Good architecture makes that contract stable while allowing internal evolution.

This hub covers the structural and lifecycle mechanics that determine whether agents remain reliable across block-level, subsystem-level, and chip-level environments.

Sub-lessons in this topic

1. agent-wrapper-role - wrapper responsibilities, API boundaries, and encapsulation.

2. standard-internals - canonical child components and role partitioning.

3. build-phase-conditional - active/passive conditional construction patterns.

4. connect-phase-wiring - sequencer-driver links and monitor analysis export.

5. analysis-port-fanout - one monitor stream, many subscribers safely.

6. architecture-debug-checklist - deterministic triage for architecture failures.

Architecture overview diagram

Legend: [UVM] [AGT] [SEQ] [DRV] [MON] [CHECK]

[UVM] test/env chooses cfg (mode, vif, knobs)
    │
    ▼
[AGT] wrapper
    ├─ [MON] monitor (always)
    ├─ [SEQ] sequencer (active only)
    ├─ [DRV] driver    (active only)
    └─ analysis_port (always)
            │
            ├─► [CHECK] scoreboard
            ├─► [CHECK] coverage
            └─► [CHECK] protocol subscribers

[UVM][AGT] lifecycle map

build_phase:
  cfg get
  monitor build
  active-only child build

connect_phase:
  drv <-> sqr handshake connection (if active)
  mon.ap -> agt.ap connection (always)

run_phase:
  active traffic (if active)
  observation fanout (always)

Key takeaways

• Architecture determines whether one agent can survive many integration contexts.

• Monitor and analysis export are always-on; active drive path is mode-gated.

• Lifecycle discipline in build/connect phases prevents hidden topology bugs.

• Clear wrapper contracts keep VIP maintainable over time.

Common pitfalls

• Treating wrapper as a passive folder instead of an explicit contract boundary.

• Building active children in passive mode and causing top-level contention.

• Allowing environments to wire directly to monitor internals.

• Deferring architecture checks until protocol-level regressions fail.