Part 8 · Checking & Coverage · Intermediate

Scoreboards, Models & Coverage in UVM

The correctness and measurement half of verification: self-checking scoreboards, reference models, predictors, functional coverage, and the UVM reporting system.

What this section covers

Stimulus exercises the DUT; checking proves it behaved correctly ; coverage measures what was tried . UVM connects monitors to scoreboards, coverage subscribers, and RAL predictors through analysis TLM — a single observed transaction stream fans out to multiple checking and measurement consumers.

Each major topic below is a hub page with five focused sub-topics. Drill into expected vs actual scoreboards, reference model fidelity, bus-to-RAL predictors, functional coverage closure, and UVM reporting for regression sign-off.

Topic map

diagram
Legend: [UVM] [CHECK] [COVER] [RAL]

┌─────────────────────────────────────────────────────────────────────────┐
│  CHECKING SECTION — topic map                                             │
├─────────────────────────────────────────────────────────────────────────┤
│                                                                           │
│  1. SCOREBOARD ARCHITECTURE [CHECK]                                       │
│     expected vs actual │ dual imps │ env wiring │ FIFO │ ID match │ debug │
│                                                                           │
│  2. REFERENCE MODELS [CHECK]                                              │
│     fidelity matrix │ cycle vs txn │ predict() │ golden path │ integration│
│                                                                           │
│  3. PREDICTORS [RAL]                                                      │
│     mirror role │ reg adapter │ env wiring │ explicit/implicit │ multi-m │
│                                                                           │
│  4. FUNCTIONAL COVERAGE [COVER]                                           │
│     subscriber │ bins/illegal │ crosses/plan │ sampling │ merge/closure │
│                                                                           │
│  5. REPORTING & VERBOSITY [UVM]                                           │
│     architecture │ severities │ IDs/verbosity │ catchers │ PASS/FAIL      │
│                                                                           │
└─────────────────────────────────────────────────────────────────────────┘

Topics and sub-topics

  1. Scoreboard Architecture — 6 sub-topics from two-stream model to check_phase debug.

  2. Reference Models — 5 sub-topics from fidelity matrix to golden-path integration.

  3. Predictors — 5 sub-topics from RAL role to multi-master debug.

  4. Functional Coverage — 5 sub-topics from subscriber setup to merge closure.

  5. Reporting & Verbosity — 5 sub-topics from architecture to PASS/FAIL playbook.


The checking pipeline

Every integrated UVM environment follows the same high-level pattern: monitors observe DUT-visible behavior, then analysis ports fan out to checking and measurement components. The diagram below shows how one monitor stream feeds three distinct consumers.

diagram
Legend: [UVM] [CHECK] [COVER] [RAL]

                    ┌──────────────────────────────────────────────┐
                    │  STIMULUS PATH [UVM]                          │
                    │  sequence  sequencer  driver  DUT pins     │
                    └──────────────────────────────────────────────┘
                                          │
                                          ▼
                                    ┌──────────┐
                                    │   DUT    │
                                    └──────────┘
                                          │
                                          ▼ (observed pins)
                              ┌───────────────────────┐
                              │  MONITOR [UVM]        │
                              │  sample()  bus_txn   │
                              └───────────────────────┘
                                          │
                          monitor.ap.write(txn)
                                          │
              ┌───────────────────────────┼───────────────────────────┐
              │                           │                           │
              ▼                           ▼                           ▼
    ┌─────────────────┐       ┌─────────────────┐       ┌─────────────────┐
    │  SCOREBOARD     │       │  COV SUBSCRIBER │       │  REG PREDICTOR  │
    │  [CHECK]        │       │  [COVER]        │       │  [RAL]          │
    │                 │       │                 │       │                 │
    │  exp vs act     │       │  covergroup     │       │  bus2reg       │
    │  compare()      │       │  .sample()      │       │  reg.predict()  │
    │  UVM_ERROR      │       │  bin hits       │       │  mirror update  │
    └─────────────────┘       └─────────────────┘       └─────────────────┘
              ▲
              │ expected stream
              │
    ┌─────────────────┐
    │  REF MODEL      │
    │  [CHECK]        │
    │  predict(req)   │
    └─────────────────┘
              ▲
              │ request stream (same or separate monitor)

Three distinct roles

  • [CHECK] Scoreboard + ref model — correctness: did the DUT do the right thing?

  • [COVER] Coverage subscriber — measurement: did we try enough scenarios?

  • [RAL] Reg predictor — register mirror sync: does RAL mirror match DUT state?

  • [UVM] Monitor is the shared ground truth — all three consume observed behavior.

End-of-test sign-off chain

diagram
run_phase
     │
     ├── scoreboard compare  UVM_ERROR count [CHECK]
     ├── coverage bins hit    coverage %         [COVER]
     └── predictor mirror     reg.mirror() OK   [RAL]
     │
     ▼
  check_phase
     │  drain unmatched expected [CHECK]
     │  zero-compare sanity      [CHECK]
     ▼
  report_phase
     │  coverage summary         [COVER]
     │  report server counts     [UVM]
     ▼
  PASS / FAIL
     errors == 0 AND coverage goal met  sign-off

Key takeaways

  • Monitors observe; scoreboards check; subscribers measure; predictors sync RAL.

  • Use nested nav sub-topics for deep dives on each mechanism.

  • All three consumers should attach to monitor streams, not driver intent.

Common pitfalls

  • Driver-sampled checking — validates stimulus, not DUT behavior.

  • Coverage without plan traceability — high % but wrong features measured.

  • RAL mirror checks without predictor — false failures on frontdoor tests.