Components in a UVM bench never call each other directly. The DMA bench's monitors do not know the scoreboard exists; its drivers do not hold a handle to a sequencer. Every one of those links goes through a TLM connection, joined in connect_phase and checked by the library before time zero. Get TLM right and components become swappable parts. Get it wrong and you meet the two failure modes this part keeps returning to: a run that dies at time zero with a Connection Error, and the worse one, a link that is legal, silent and delivers nothing.
Wire any link in a bench, in the right direction, and explain each port, export and imp by who calls and who implements.
State exactly what an analysis write() promises: zero time, fan-out and fan-in, and a subscriber order you must not rely on.
Predict which unconnected connectors fail elaboration, and use the library's FIFOs and channels.
Choose between imp_decl callbacks and analysis FIFOs for a scoreboard, and triage a transaction that went missing.
Drive a TLM 2.0 model through sockets: blocking and non-blocking transport, timing annotation, response status and extensions.
Topic | Lessons | What it covers |
|---|---|---|
7 | Roles, connect rules and pass-through, put/get/peek/transport, analysis broadcast and | |
5 | Initiator, target and passthrough sockets, blocking transport and |
Four rules have their single home in this part, and other lessons link here for them: the connect direction rules in connect() rules and pass-through; the subscriber order and fan-out rules in Analysis broadcast; and the unconnected-port rule in TLM1 channels and port cardinality.
Every log in this part comes from tlm_tb.sv in the course bench. It includes dma_tb.sv and adds the TLM tests: tlm_deaf_test, tlm_fifo_test, tlm_channel_test, tlm_cardinality_test and tlm_export_port_test for TLM-1, dma_fifo_sb_test, dma_fifo_slow_test and dma_fifo_drain_test for the FIFO scoreboard, and tlm2_gp_test for TLM 2.0; the full source lists them with what each shows. On EDA Playground, paste dma_dut.sv as the design, add dma_tb.sv (all three parts of the bench source) and tlm_tb.sv as testbench files, compile tlm_tb.sv, and pick a test with +UVM_TESTNAME=. Locally: scripts/tools/uvm-bench/run.sh scripts/data/uvm-course/bench/tlm_tb.sv +UVM_TESTNAME=tlm2_gp_test.