A DV engineer meets TLM 2.0 when the bench has to talk to something that was not written in UVM: a SystemC model of the DMA's register block from the virtual-platform team, a C++ reference model wrapped for co-simulation, or the register layer's own uvm_reg_tlm_adapter. TLM 2.0 standardizes one memory-mapped transaction, the generic payload, and a timing contract, so models from different teams plug together. UVM-SV implements a subset of it. This topic covers that subset, and where it stops.
Declare and bind initiator, target and passthrough sockets, and predict what connect() refuses.
Write a b_transport target and initiator that agree on who consumes the annotated delay.
Follow a non-blocking transfer through its phases, including the legal shortcuts.
Explain temporal decoupling and why UVM-SV has no quantum keeper.
Build a generic payload correctly, return the right response status, and carry sideband data in an extension.
Lesson | What you learn |
|---|---|
What a socket bundles, the socket classes, passthrough sockets, and binding rules. | |
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The four phases, sync return values, and the 3-, 2- and 1-call shortcuts. | |
Running ahead of simulation time with a local offset and a quantum, and loosely versus approximately timed. | |
Fields and accessors, response status codes, byte enables, streaming width, |