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Course contents

  • How to Use This Course
  • Reading Paths
  • Concept Map
  • Meet DCRouter
  • Glossary
  • Part 0: What Verification Is8
  • Part 1: What Can Go Wrong11
  • Part 2: Specifications as Checkable Rules8
  • Part 3: Observability and Controllability7
  • Part 4: Stimulus11
  • Part 5: Checking11
  • Part 6: Coverage10
  • Part 7: Formal and Simulation10
  • Part 8: Verification Levels and Reuse8
  • Part 9: Planning and Risk9
  • Part 10: Emulation and Prototyping8
  • Part 11: Post-Silicon Validation8
  • Part 12: Bug Economics8
  • Part 13: Debug7
  • Part 14: Sign-Off7
  • Part 15: Verification in Context8
  • Part 16: Case Studies5
    • How to Read an Escape
    • The Pentium FDIV Bug
    • A Chipset Recall
    • Speculative Execution Attacks
    • Writing a Post-Mortem
  • Part 17: Capstones5
  • Part 18: Interview Preparation6
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‹Part 16: Case Studies
  1. Topics
  2. First Principles of Verification Strategy
  3. Part 16: Case Studies
  4. How to Read an Escape

Part 16 · Case Studies · Senior (S)

How to Read an Escape

Public escapes are expensive lessons that someone else has already paid for, but only if they are read carefully: separating what is documented from what is guessed, and asking the course's questions of each one. A reading template (what failed, where it could have been caught, why it was not, what changed) and the rules this part follows.

On this page

    Note

    Level: Senior (S) · Answers: What can real projects teach us?

    Before this: Closing the Loop

    Every lesson in this course has used DCRouter, whose bugs were planted and whose answers were known. Real escapes are different: the full story is rarely public, the people involved know far more than they can say, and retellings drift into legend. This part reads three well-documented public escapes. To learn from them, we need a disciplined way to read.

    How should you read a public escape so that it teaches something true?

    The obvious answer, and why it breaks

    The obvious way is to read the story and draw the moral: "they should have tested more". That moral fits every escape and teaches nothing. Worse, popular retellings often add details nobody documented (who knew what, which test was skipped), and a lesson drawn from an invented detail is an invented lesson. Reading well means asking specific questions and keeping track of which answers are documented and which are inference.

    The idea: four questions, two kinds of answer

    Question

    What to look for

    Course link

    What failed?

    The observable failure, its trigger and its scope

    Part 1: the bug class

    Where could it have been caught?

    Which technique's pool contains this bug: specification, stimulus, checking, coverage, formal, validation, margins

    Parts 2-11

    Why was it not caught?

    Unreached, masked, unchecked or unspecified; or outside what pre-silicon verification models

    Lesson 3.3 and 11.7

    What changed afterwards?

    Fixes, process changes, new methods in the industry

    Part 12: the cost of finding it late

    For each answer, mark whether it is documented (in a public statement, paper or contemporary report, listed in the course's fact sheet) or inference (the course's reading of what the documented facts imply). Both are useful; confusing them is how myths start.

    The rules this part follows

    • Only publicly documented facts, each with a source in the fact sheet (facts C1-C7).

    • No invented internal stories: no claims about who decided what, or which test was skipped, unless documented.

    • Inference labelled as inference: "the course's reading" marks it.

    • No blame: every team that shipped these chips had capable engineers and serious verification; the question is what kind of bug got through, not who failed.

    The three cases at a glance

    Case

    What failed (documented)

    Kind of escape (the course's reading)

    Pentium FDIV (1994)

    Missing entries in a division lookup table gave rare wrong quotients (facts C1, C4)

    Functional, rarely triggered, in a small fully specified structure that could be checked exhaustively

    Cougar Point SATA (2011)

    A transistor overstressed by its bias voltage could degrade SATA ports over time (facts C2, C5)

    Electrical and reliability, outside what functional RTL verification models

    Spectre and Meltdown (2018)

    Speculative execution left secret-dependent traces in the cache (facts C3, C6)

    Every result correct; a security property nobody had stated

    Three escapes, three different gaps: a check that was not exhaustive where it could have been, a margin that functional verification cannot see, and a property that was not in anyone's specification. That spread is itself the lesson: no single technique would have caught all three.

    How real teams use public escapes

    Practice

    Purpose

    Reading published errata and post-mortems in the same domain

    Learn the bug classes that escape similar designs

    Adding each class to the plan's checklist of interaction features

    The lesson outlives the people who read it

    Asking "which of our checks would have caught this?"

    Tests the plan against a real failure

    What breaks

    A team (illustrative) circulated a retelling of a famous escape that blamed a skipped regression. The detail was not in any public source. The team added more regression runs, which addressed nothing in its own risk, while its real gap, an unchecked class of configuration, stayed open. The documented facts would have pointed at a different lesson.

    Why this matters

    Senior lens. Read escapes with four questions (what failed, where it could have been caught, why it was not, what changed), keep documented facts and your own inference apart, and turn each into the question "which of our checks would catch this kind of bug?"

    Interview

    Asked: "Tell me about a famous hardware escape and what it teaches."

    Weak answer: The Pentium bug: Intel didn't test enough.

    Strong answer: The Pentium FDIV bug: missing entries in the SRT division lookup table gave rare wrong quotients; Intel attributed it to a script error that omitted table entries. It teaches that a small, fully specified structure like a lookup table can be checked exhaustively against its definition, or the algorithm proved formally, and random end-to-end testing is a poor way to find a rare trigger. Afterwards, formal verification of floating-point units became standard practice. I'd keep separate what's documented and what's my reading of it.

    Follow-ups: (1) What kind of escape was the Cougar Point SATA issue? (2) Which check would have caught it?

    Check yourself Why is "they should have tested more" a poor lesson?

    It fits every escape and says nothing about which technique, check or property was missing.

    Check yourself What is the difference between a documented fact and an inference in a case study?

    A documented fact comes from a public statement, paper or contemporary report; an inference is the reader's interpretation of what those facts imply, and must be labelled as such.

    Key takeaways

    • Read every escape with four questions: what, where, why not, what changed.

    • Keep documented facts and inference apart; never invent internal details.

    • Turn each escape into: which of our checks would catch this kind of bug?

    Keep going

    Next: Lesson 16.2, The Pentium FDIV Bug. A missing table entry and the case for exhaustive and formal checks.

    Related topics

    • Part 16 overview: Case Studies

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    See also

    • A Chipset Recall
    • Speculative Execution Attacks
    • Writing a Post-Mortem